Analog Devices Inc./Maxim Integrated MAX5969AETE+T

Overview

MAX5969AETE+T from Maxim Integrated is an IEEE 802.3af/at-compliant powered device (PD) interface controller with integrated n-channel isolation MOSFET, supporting 2-event classification and wall adapter detection for PoE-powered endpoints. It delivers inrush current limiting (≤180mA), operating current limit (720–880mA), and 100V absolute maximum input rating, enabling robust power handoff in IP phones and security cameras.

For engineers reviewing the MAX5969AETE+T datasheet, MAX5969AETE+T pinout, MAX5969AETE+T application, or MAX5969AETE+T equivalent, key selection considerations include UVLO threshold (35.4V turn-on), TDFN-EP package thermal performance (θ_JA = 4°C/W), 2EC latched Type 2 PSE detection, and seamless switchover between PoE and wall adapter sources.

Technical Context

The MAX5969AETE+T implements a four-mode state machine-detection (1.4–10.1V), classification (12.6–20V), mark event (falling <11.6V), and power mode (>35.4V)-with hardware-based slope detection (ΔV/ΔI) using R_DET = 24.9kΩ and programmable classification via R_CLS. Its integrated 0.5–0.7Ω isolation MOSFET enables direct connection to downstream DC-DC converters at RTN.

It features dual UVLO hysteresis (4.2V for MAX5969A), 120μs deglitch time to reject cable-resistive transients, and thermally triggered shutdown at +140°C with 28°C hysteresis. The 2EC output latches low upon Type 2 PSE recognition and asserts independently for wall adapter detection (>9V WAD-to-RTN).

Key Specifications

Pinout & Package

MAX5969AETE+T is housed in a thermally enhanced 10-pin, 3mm × 3mm TDFN-EP package with exposed pad (EP) soldered to VSS for optimal heat dissipation. Pin 1 is VDD; Pin 5 is VSS (MOSFET source); Pin 6 is RTN (MOSFET drain); Pin 7 is WAD (wall adapter sense); Pin 8 is PG (open-drain power-good); Pin 9 is 2EC (latched 2-event detect/wall adapter flag); Pin 10 is CLS (classification resistor input). Pins 3 (N.C.) and 4 (I.C.) are not connected internally.

Key Features

Applications

Availability

MAX5969AETE+T is available at Aetrix Electronics and suitable for IP phones, wireless access nodes, IP security cameras, and WiMAX base stations requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for MAX5969AETE+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs precision analog, mixed-signal, and power management ICs for industrial, communications, and computing applications.

The MAX5969A series targets IEEE 802.3af/at powered devices needing integrated PoE interface, thermal resilience, and auxiliary power arbitration-optimized for space-constrained, high-reliability endpoints.

FAQ

What is the UVLO turn-on threshold for MAX5969AETE+T?

The MAX5969AETE+T has a guaranteed UVLO turn-on threshold of 35.4V (min 34.3V, max 36.6V), with 4.2V hysteresis ensuring stable power-mode entry after PoE voltage stabilizes. This threshold is specific to the MAX5969A variant; the MAX5969B uses 38.6V. The MAX5969AETE+T must exceed this voltage to activate its isolation MOSFET and enter normal operation.

Does MAX5969AETE+T support IEEE 802.3at Type 2 classification?

Yes, the MAX5969AETE+T fully supports IEEE 802.3at Type 2 (2-event) classification via its dedicated 2EC pin and internal state machine. It generates the required mark event (current pulse below 10.1V) and reset event (below 5.2V), enabling PSEs to identify and allocate up to 25.5W. The MAX5969AETE+T latches 2EC low upon successful Type 2 handshake, providing a clean system-level flag for host processor use.

How does MAX5969AETE+T handle wall adapter detection and switchover?

The MAX5969AETE+T detects wall adapters via the WAD pin, triggering switchover when voltage exceeds 9V relative to RTN. Upon detection, it immediately turns off the isolation MOSFET, disables classification current, and activates the 2EC current sink. This hardware-based arbitration requires no microcontroller intervention and ensures glitch-free transition-critical for maintaining uptime in MAX5969AETE+T-based IP phones and cameras.

What is the thermal shutdown behavior of MAX5969AETE+T?

The MAX5969AETE+T triggers thermal shutdown at +140°C junction temperature, turning off both the isolation MOSFET and 2EC sink. Recovery occurs at +112°C (28°C hysteresis), after which the device re-enters inrush mode before returning to steady-state power mode. This behavior protects against sustained overloads and ensures safe self-recovery without external reset-verified across the full -40°C to +85°C operating range of the MAX5969AETE+T.

What package type and footprint does MAX5969AETE+T use?

The MAX5969AETE+T uses a 10-pin, 3mm × 3mm TDFN-EP package (package code T1033+1) with exposed pad (EP) that must be soldered to VSS for thermal and electrical integrity. It features 0.5mm pitch, bottom-side thermal pad, and JEDEC-standard land pattern (document #21-0137). This compact, thermally efficient package enables high-density layouts in space-constrained PoE endpoints using the MAX5969AETE+T.