My Inquiry
My Account
Analog Devices Inc./Maxim Integrated MAX5982CETE+T
- Part No.:
- MAX5982CETE+T
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Category:
- Power Over Ethernet (PoE) Controllers
- Package:
- 16-WQFN Exposed Pad
- Datasheet:
-
MAX5982CETE+T.pdf
- Description:
- IC POE CNTRL 1 CHANNEL 16TQFN
- Quantity:
- Payment:
- Shipping:
Inventory:384
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
MAX5982CETE+T from Analog Devices is an IEEE 802.3af/at-compliant powered device (PD) interface controller with integrated 70W n-channel isolation MOSFET, 100V absolute maximum input rating, inrush current limit ≤182mA, and normal-operation current limit 1700–2100mA. It enables PoE-powered IP security cameras and wireless access nodes to safely negotiate power classification, manage wall-adapter switchover, and deliver power-good signaling.
For engineers reviewing the MAX5982CETE+T datasheet, MAX5982CETE+T pinout, MAX5982CETE+T application, or MAX5982CETE+T equivalent, this page delivers verified technical context on 2-event classification behavior, RTN-referenced voltage thresholds, thermal shutdown at +150°C, and TQFN-16 package layout constraints - all specific to the MAX5982C variant.
Technical Context
The MAX5982CETE+T implements a dual-stage PoE power-handling architecture: detection/classification logic operates across 1.4–20.5V input range using differential signature resistance (25.00kΩ ±0.55kΩ), while power mode activates above 35.4V UVLO turn-on threshold with 4.2V hysteresis. Its isolation MOSFET features 0.1–0.25Ω on-resistance (TJ = +25°C to +125°C) and supports foldback current limiting triggered at VRTN ≥7.0V.
Unlike MAX5982A/B variants, MAX5982CETE+T omits LED driver, SL, WK, and ULP pins - confirmed by pin configuration tables and block diagrams. It retains full 2-event classification support via 2EC output (1.5mA sink), wall-adapter detection at WAD-to-RTN ≥9V, and PG open-drain assertion during inrush (tDELAY = 90–102ms) and sleep states.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| IEEE Compliance | Fully compliant with 802.3af (Class 0–4) and 802.3at (Class 0–5, 2-event classification) standards for PD interface. |
| Input Voltage Range | Operates from 35.4V (UVLO turn-on) to 60V; withstands 100V absolute maximum - accommodates PoE+ cable drop and transient surges. |
| Inrush Current Limit | ≤182mA during initial turn-on; prevents downstream DC-DC converter stress before MOSFET full enhancement. |
| Normal Operation Current Limit | 1700–2100mA (–40°C to +85°C); sets maximum continuous power delivery capability of integrated 70W MOSFET. |
| Thermal Shutdown | Triggers at +150°C junction temperature with +30°C hysteresis; forces MOSFET off and initiates safe inrush restart sequence. |
| Package | 16-pin TQFN (5mm × 5mm, exposed pad); θJA = 35°C/W enables high-power dissipation in compact PoE endpoint layouts. |
| 2EC Output Function | 1.5mA current sink asserted during Type 2 PSE detection or wall-adapter presence; latched for Type 2 until VIN drops below reset threshold (2.7–5.2V). |
Pinout & Package
MAX5982CETE+T uses a thermally enhanced 16-pin TQFN package (5mm × 5mm, 0.5mm pitch) with exposed pad connected externally to VSS for optimal heat dissipation. Pin 1 is top-left corner (marking dot adjacent), and EP must be soldered to a large copper plane.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 13–16 | N.C. | No internal connection; must remain unconnected per datasheet - not usable as ground or signal. |
| 2 | VDD | Main positive supply input; requires ≥68nF bypass capacitor to VSS for stable UVLO and detection operation. |
| 3 | DET | Detection resistor input; connects to 24.9kΩ signature resistor (RDET) between VDD and DET for IEEE-compliant ΔV/ΔI detection. |
| 4 | I.C. | Internally connected node; leave unconnected - no external circuitry permitted. |
| 5, 6 | VSS | Negative supply input and MOSFET source reference; ties directly to downstream DC-DC converter ground and EP. |
| 7, 8 | RTN | MOSFET drain terminal; connects to PoE transformer secondary center-tap and serves as voltage reference for WAD, 2EC, and PG. |
| 9 | WAD | Wall adapter detector input; asserts 2EC when voltage from WAD to RTN exceeds 9V - enables seamless auxiliary power switchover. |
| 10 | PG | Open-drain power-good output; sinks 230µA minimum during inrush delay (90–102ms) and sleep mode to disable downstream DC-DC. |
| 11 | 2EC | 2-event classification/wall-adapter detect output; 1.5mA sink activated on Type 2 PSE detection or WAD presence - used for system status indication. |
| 12 | CLS | Classification resistor input; connects to RCLS (e.g., 615Ω for Class 0) to set IEEE-defined classification current (0–64mA). |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 70W Isolation MOSFET | On-resistance 0.1–0.25Ω over –40°C to +125°C enables high-efficiency power transfer without external FET or gate driver. |
| 2-Event Classification Support | Hardware-level implementation of IEEE 802.3at mark/reset event sequencing - eliminates need for external microcontroller coordination. |
| Wide UVLO Hysteresis & Deglitch | 4.2V turn-on/off hysteresis and 30–120µs deglitch time prevent false power cycling due to twisted-pair resistive drop or line noise. |
| Wall Adapter Detection | Dedicated WAD input senses >9V relative to RTN and automatically disables PoE MOSFET while asserting 2EC - ensures zero-interruption power handover. |
| Thermal Foldback Protection | Reduces current limit to 53mA when VRTN ≥7.0V during overload - limits MOSFET power dissipation and avoids thermal runaway. |
Applications
| IP Security Cameras | Wireless Access Nodes |
|---|---|
|
Use Scenario: Outdoor PoE-powered camera with local wall adapter backup for extended uptime during network outages. IC Role / Device Role / Timing Role: PD interface controller managing IEEE 802.3at classification, inrush control, and automatic WAD switchover. Use Value: Enables uninterrupted operation via dual-source power management while meeting Class 4 (25.5W) power budget with integrated MOSFET. |
Use Scenario: Indoor Wi-Fi 6 access point deployed via Cat6 cabling with thermal constraints in enclosed ceiling spaces. IC Role / Device Role / Timing Role: Primary PoE power-handling IC providing UVLO stability, thermal shutdown, and PG-controlled DC-DC enable timing. Use Value: Delivers reliable 70W power delivery with 35°C/W thermal resistance and +150°C shutdown - prevents field failures in high-ambient environments. |
| VoIP Phones with Local Power | Industrial IoT Gateways |
|
Use Scenario: Enterprise VoIP phone supporting both PoE and USB-C wall adapter, requiring silent power source transition. IC Role / Device Role / Timing Role: Dual-input PD controller using WAD detection and 2EC signaling to coordinate power source arbitration. Use Value: Eliminates audio dropouts during switchover via hardware-based WAD sensing and immediate MOSFET disable - no firmware latency. |
Use Scenario: Factory-floor gateway aggregating sensor data via PoE, operating continuously in ambient temperatures up to +85°C. IC Role / Device Role / Timing Role: Robust PD interface with extended temperature rating (–40°C to +125°C) and foldback current limiting under sustained overload. Use Value: Ensures long-term reliability in harsh environments via +125°C operational rating and thermal foldback that sustains MOSFET integrity during brownouts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar powered device interface applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX5982BETE+T | Includes SL, WK, ULP, and LED pins; supports sleep/ultra-low-power modes and LED status indication - absent in MAX5982CETE+T. | Required where low-power standby (MPS-compliant sleep) or visual status feedback is needed - not applicable for always-on endpoints. | Select MAX5982BETE+T only if sleep-mode functionality or LED driver is required; MAX5982CETE+T reduces BOM count and layout complexity for fixed-power applications. |
| LT4275IMS#PBF | Supports 802.3af/at with 100V abs max, but uses external MOSFET; lacks integrated 70W switch and WAD detection circuitry. | Suitable for designs needing higher voltage margin or discrete FET selection flexibility, but adds gate driver, layout, and thermal design overhead. | Choose LT4275IMS#PBF when external FET control or custom thermal path is mandatory; MAX5982CETE+T provides faster time-to-market with single-chip integration. |
Compared with MAX5982BETE+T and LT4275IMS#PBF, MAX5982CETE+T offers the most compact solution for always-on PoE endpoints by eliminating sleep-control pins and integrating the 70W MOSFET - reducing component count, PCB area, and thermal interface complexity without sacrificing 2-event classification or wall-adapter detection.
Availability
MAX5982CETE+T is available at Aetrix Electronics and suitable for IP security cameras, wireless access nodes, and industrial IoT gateways requiring stable component supply, extended temperature operation (–40°C to +125°C), and IEEE 802.3at compliance.
Supply support for MAX5982CETE+T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, communications, automotive, and consumer markets since 1965.
The MAX5982 family targets IEEE 802.3af/at powered device interface applications, delivering integrated PoE power-handling with robust protection, classification, and auxiliary power management - optimized for space-constrained, thermally demanding endpoints.
FAQ
What is the absolute maximum input voltage rating for MAX5982CETE+T?
The MAX5982CETE+T has an absolute maximum input voltage rating of 100V across VDD to VSS. This rating allows it to withstand PoE transients, cable voltage drop, and surge events without damage, while its operational UVLO turn-on threshold remains at 35.4V - ensuring reliable startup under real-world Ethernet cabling conditions. The 100V rating is validated per Analog Devices' Absolute Maximum Ratings table.
Does MAX5982CETE+T support 2-event classification per IEEE 802.3at?
Yes, MAX5982CETE+T fully supports IEEE 802.3at 2-event classification. It implements hardware-based mark/reset event detection with thresholds of 10.7V (mark) and 3.8V (reset), and asserts the 2EC output as a 1.5mA current sink upon Type 2 PSE detection. This behavior is explicitly documented in the Electrical Characteristics and Detailed Description sections of the MAX5982A/B/C datasheet.
How does wall adapter detection work on MAX5982CETE+T?
MAX5982CETE+T detects wall adapters via the WAD pin referenced to RTN: when voltage from WAD to RTN exceeds 9V (with ±1V hysteresis), the device disables the internal isolation MOSFET, asserts 2EC, and disables classification current. This hardware-level detection enables seamless, glitch-free switchover without firmware intervention - confirmed in the Wall Power Adapter Detection section of the datasheet.
What is the purpose of the 2EC pin on MAX5982CETE+T?
The 2EC pin on MAX5982CETE+T serves dual functions: it acts as a 2-event classification indicator (1.5mA sink) when probed by a Type 2 PSE, and as a wall-adapter present flag when WAD voltage exceeds 9V. It is latched during Type 2 detection until VIN falls below the reset threshold (2.7–5.2V), enabling system-level status monitoring without additional logic - as defined in the Pin Description table.
What thermal protection features does MAX5982CETE+T include?
MAX5982CETE+T includes junction-based thermal shutdown at +150°C with +30°C hysteresis, plus current-foldback activation when VRTN ≥7.0V. Upon thermal trip, the isolation MOSFET, 2EC sink, and PG output are disabled; recovery begins only after junction temperature falls to +120°C, followed by controlled inrush restart. These protections are production-tested and specified in the Electrical Characteristics table.
MAX5982CETE+T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc./Maxim Integrated
- Series:
- -
- Package/Case:
- 16-WQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Controller (PD)
- Number of Channels:
- 1
- Power - Max:
- 70 W
- Internal Switch(s):
- Yes
- Auxiliary Sense:
- Yes
- Standards:
- 802.3at (PoE+), 802.3af (PoE)
- Voltage - Supply:
- 36.6V ~ 60V
- Current - Supply:
- 250µA
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-TQFN (5x5)
MAX5982CETE+T FAQ
1.How can I place an order for MAX5982CETE+T through Aetrix?
Please submit a Request for Quotation (RFQ) for MAX5982CETE+T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MAX5982CETE+T reliable?
The price and inventory of MAX5982CETE+T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MAX5982CETE+T is usually 5 days.
3.What payment methods are accepted for MAX5982CETE+T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MAX5982CETE+T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MAX5982CETE+T?
MAX5982CETE+T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MAX5982CETE+T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MAX5982CETE+T?
For technical support, including MAX5982CETE+T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MAX5982CETE+T requirements.
6.How does Aetrix verify that MAX5982CETE+T is sourced from the original manufacturer or authorized distributors?
All MAX5982CETE+T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MAX5982CETE+T meets industry standards.
7.What is the process for return or replacement of MAX5982CETE+T?
All MAX5982CETE+T units undergo pre-shipment inspection (PSI). If there is an issue with MAX5982CETE+T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MAX5982CETE+T part is unused and in its original packaging.
Return procedure for MAX5982CETE+T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
MAX5982CETE+T Tags
-
TPS2378DDAR
Texas Instruments
-
TPS23753APWR
Texas Instruments
-
TPS23756PWPR
Texas Instruments
-
TPS23750PWPR
Texas Instruments
-
MP8007GV-Z
Monolithic Power Systems Inc.
-
TPS23861PWR
Texas Instruments
-
TPS23753PWR
Texas Instruments
-
PD69201ILD-TR
Microchip Technology
-
SI3402-B-GM
Skyworks Solutions Inc.
-
SI3402-B-GMR
Skyworks Solutions Inc.
-
SI34071-A01-GMR
Skyworks Solutions Inc.
-
SI3404-A-GMR
Skyworks Solutions Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
