Analog Devices Inc./Maxim Integrated MAXQ1062EUD+

Overview

MAXQ1062EUD+ from Maxim Integrated is a DeepCover® cryptographic controller designed as a secure coprocessor for embedded systems, providing hardware-accelerated TLS/DTLS key negotiation (ECDHE, PSK), ECDSA-based authentication, AES-128/256 encryption (ECB/CBC/CCM/GCM), SHA-256/384/512 hashing, and true RNG–all with 8KB of secure EEPROM for certificates, keys, and monotonic counters. It operates over SPI or I²C and serves as a secure bootloader for external microcontrollers in industrial gateways and smart meters.

For engineers reviewing the MAXQ1062EUD+ datasheet, MAXQ1062EUD+ pinout, MAXQ1062EUD+ application, or MAXQ1062EUD+ equivalent, this page delivers verified specifications, interface behavior, tamper-resistant lifecycle management, secure channel protocols, and FIPS/Common Criteria EAL4+-aligned cryptographic service boundaries-critical for IoT device certification and secure boot validation.

Technical Context

The MAXQ1062EUD+ implements two distinct operational modes: TLS/DTLS Toolbox mode (for full protocol offload including certificate chain verification, ECDSA signature generation/verification, and master secret derivation) and AES-SPI mode (for high-speed stream encryption up to 20Mb/s using AES-GCM or AES-ECB with dedicated DMA). Each mode uses separate command interpreters and memory access controls.

Its security architecture enforces strict separation: private keys are never exposed externally; TLS handshake secrets remain internal; and all key objects are integrity-protected and verified before use. Tamper detection, watchdog timer, power-on/brownout reset, and life cycle state transitions (e.g., provisioning → active → locked) are implemented in hardened logic with RESET_OUT assertion capability.

Key Specifications

Pinout & Package

MAXQ1062EUD+ is housed in a 14-pin TSSOP package (3.0mm × 4.4mm, 0.65mm pitch) with exposed pad for thermal performance and EMI control. Pin functions are validated per Maxim Integrated ABRIDGED DATA SHEET Rev 5 (12/2019).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar cryptographic coprocessor applications.

Compared with ATECC608A-TFLXT and SE050N-A111, the MAXQ1062EUD+ uniquely combines industrial temperature resilience, integrated TLS 1.2/DTLS 1.2 offload with Mbed TLS compatibility, and a dedicated 20Mb/s AES-SPI engine-making it optimal for resource-constrained industrial gateways needing both protocol abstraction and high-throughput encrypted data tunneling.

Availability

MAXQ1062EUD+ is available at Aetrix Electronics and suitable for smart metering, industrial PLC security, and secure access control applications requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for MAXQ1062EUD+ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Maxim Integrated (now part of Analog Devices) designs high-performance analog and mixed-signal ICs for industrial, automotive, and computing applications-with emphasis on reliability, security, and integration.

The MAXQ1062EUD+ belongs to the DeepCover® cryptographic controller product line, engineered specifically to provide certified, hardware-enforced security for embedded devices lacking internal crypto acceleration-targeting IoT endpoints, industrial controllers, and infrastructure edge nodes.

FAQ

What communication interfaces does the MAXQ1062EUD+ support?

The MAXQ1062EUD+ supports both I²C and SPI interfaces, with mode selection determined at power-up. In I²C mode, it operates as a slave at up to 400kps with configurable 7-bit address (default 0x60). In SPI mode, it uses Mode 0 (CPOL=0, CPHA=0), LSB-first protocol with active-low SSEL-enabling either TLS toolbox commands or high-speed AES-SPI streaming.

How does the MAXQ1062EUD+ ensure private key confidentiality during TLS operations?

The MAXQ1062EUD+ ensures private key confidentiality by never exposing private keys outside its secure boundary. During TLS handshakes, all key exchange (ECDHE), signature generation (ECDSA), and master secret derivation occur internally. The master secret may be exported for external record-layer processing, but private keys remain protected in integrity-verified, non-readable secure EEPROM.

Can the MAXQ1062EUD+ function as a secure bootloader for an external microcontroller?

Yes, the MAXQ1062EUD+ can serve as a secure bootloader by verifying the SHA-384 hash and ECDSA signature of the host microcontroller's firmware image before allowing execution. It supports flexible access conditions and life cycle states to enforce boot policy-e.g., blocking boot if the image fails signature verification or if the device is in a locked state.

What is the purpose of the WDI and RESET_OUT pins on the MAXQ1062EUD+?

The WDI (Watchdog Input) pin requires periodic toggling by the host MCU within a user-configurable timeout period; failure triggers a RESET_OUT pulse if enabled. RESET_OUT is an open-drain output that asserts low on WDT timeout, tamper detection, or life cycle violation-allowing the host system to perform controlled reset or fail-safe shutdown without internal device reset.

Does the MAXQ1062EUD+ support certificate chain validation and parent certificate trust anchoring?

Yes, the MAXQ1062EUD+ supports full certificate chain validation: certificates are stored in integrity-protected memory and automatically verified using one or more parent certificates already present in the device. Arbitrary certificates cannot be loaded unless signed by a trusted root or intermediate CA stored internally-enforcing strict PKI hierarchy compliance.