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Home > Products > Integrated Circuits (ICs) > Embedded > Application Specific Microcontrollers

Microchip Technology MEC1322-LZY-C0

Name: MEC1322-LZY-C0
Brand: Microchip Technology
SKU: MEC1322-LZY-C0
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: MEC1322-LZY-C0

Manufacturer:: Microchip Technology

Category:: Application Specific Microcontrollers

Package:: 132-VFQFN Dual Rows, Exposed Pad

Datasheet:: MEC1322-LZY-C0.pdf

Description:: KEYBOARD AND EMBEDDED CONTROLLER

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Product details

Overview

MEC1322-LZY-C0 from Microchip Technology is an ARM® Cortex®-M4-based embedded controller IC designed for notebook PC keyboard and system power management. It integrates 128KB SRAM (96KB code + 32KB data), LPC interface (19–33 MHz), dual SPI memory interfaces, RTC with VCC0 backup, 5-channel 10-bit ADC (12 µs conversion), and hardware root-of-trust via RSA-2048/SHA-256 EC code validation.

For engineers reviewing the MEC1322-LZY-C0 datasheet, MEC1322-LZY-C0 pinout, MEC1322-LZY-C0 application, or MEC1322-LZY-C0 equivalent, this device serves as a secure, low-power embedded controller for ACPI-compliant laptop platforms requiring integrated keyboard scan, fan control, SMBus host controllers, PECI 3.0, and hibernation timer support.

Technical Context

The MEC1322-LZY-C0 implements a full ARMv7-M architecture with hardware FPU, NVIC supporting 240 interrupt sources and 8 priority levels, and comprehensive debug infrastructure including SWJ-DP, DWT, FPB, ITM, ETM, and TPIU. Its subsystems include dual ACPI-ECI ports, 8042-emulated mailbox interface with 43 scratch registers, and BC-Link master for inter-chip communication.

Power management is handled through dual supply domains (VCC1 and VBAT), integrated VCC1 reset generator, RSMRST# deep-sleep support, and low-power sleep modes across all functional blocks. The device supports secure boot via PKCS#1 signature verification of EC firmware loaded from private or shared SPI flash before host processor initialization.

Key Specifications

Parameter	Value and Actual Design Meaning
CPU Core	ARM Cortex-M4 with hardware FPU and 32-bit Von Neumann address space - enables deterministic real-time execution of complex EC firmware with floating-point math.
Memory	128KB on-chip SRAM (96KB code-optimized + 32KB data-optimized) and 32KB boot ROM - eliminates external RAM dependency and accelerates boot sequence.
LPC Interface	Intel Low Pin Count bus compliant, 19–33 MHz operation - directly replaces legacy 8042 EC in modern x86 notebook platforms with ACPI SCI/SMI# signaling.
Security	RSA-2048/SHA-256 digital signature validation of EC firmware - enforces hardware-rooted trust by rejecting unsigned or tampered code pre-host boot.
ADC	5-channel 10-bit SAR ADC, 12 µs conversion time, 2.9 mV resolution over 0–3.3 V range - supports accurate thermal monitoring and battery voltage sensing.
Fan Control	RPM-based algorithm with ±3% accuracy from 500–16k RPM, automatic tach feedback, spin-up routine, and aging detection - delivers precise thermal management without host CPU intervention.
Timers & PWM	Four 16-bit + two 32-bit programmable timers; four independent PWM outputs with 16-bit duty cycle granularity - enables flexible timing, LED breathing, and fan speed regulation in all power states.

Pinout & Package

MEC1322-LZY-C0 is packaged in a 144-pin WFBGA (6.0 × 6.0 mm, 0.4 mm pitch) with ball-out mapping defined in Microchip DS00001719D. The package supports VCC1 (core/suspend), VBAT (backup), and analog (AVCC/AVSS) power domains, plus dedicated pins for XTAL1/XTAL2 (32.768 kHz crystal), 32KHZ_OUT, RSMRST#, and VCC1_RST#.

Pin/Terminal	Circuit Role	Design Meaning
XTAL1 / XTAL2	32.768 kHz crystal oscillator inputs	Drive internal RTC and hibernation timers; require external 12.5 pF load capacitance crystal for stable timekeeping under VCC0/VBAT.
RSMRST#	System resume reset output	Asserted during deep-sleep exit to coordinate south bridge SUSCLK gating and enable "instant-on" wake behavior per Intel platform specs.
VCC1_RST#	Open-drain reset output	Drives host processor reset line; cannot be reconfigured as GPIO - ensures reliable power-on reset sequencing independent of firmware state.
GPIO140 / TACH2 / TACH2PWM_IN	Dual-function tachometer input / PWM capture	Supports RPM measurement from second fan; enables closed-loop fan control using same physical pin for feedback and PWM signal routing.
GPIO034 / PWM2 / TACH2PWM_OUT	Dual-function PWM output / tachometer PWM drive	Generates variable-duty-cycle PWM for fan speed control while simultaneously providing synchronized tachometer pulse output for RPM verification.

Key Features

Feature	Design Value
Secure Boot Enforcement	Hardware-accelerated RSA-2048/SHA-256 signature check on every EC firmware load from SPI flash - prevents persistent malware injection at boot level.
ACPI-Compliant Power Management	Full PM1 block interface with SCI event generation, SMI# output, and RSMRST# deep-sleep coordination - meets Intel mobile platform power state transition requirements.
Integrated Fan Control Engine	Dedicated RPM-based algorithm with automatic spin-up, ramp rate control, and invalid-drive detection - reduces host CPU polling overhead and improves thermal response latency.
Multi-Protocol Serial Host Interfaces	Four SMBus 2.0 host controllers (400 kHz / 1 Mbps), PECI 3.0, dual UART, and BC-Link master - enables concurrent communication with battery, thermal sensors, chipset, and companion ICs.
Low-Power Keyboard Scan	18×8 matrix scan with row predrive, interrupt/wake capability, and PS/2 edge-wake support - maintains full keyboard responsiveness during suspend-to-RAM with sub-mW power draw.

Applications

Mobile Notebook Power Management	Secure Embedded Controller Platform
Use Scenario: Managing system-wide power states (S0–S5), thermal throttling, battery charging, and lid-open/closed detection in ultrabook designs. IC Role / Device Role / Timing Role: Primary ACPI Embedded Controller interfacing with south bridge via LPC; generates SCI/SMI# events and drives RSMRST# for deep-sleep coordination. Use Value: Reduces platform BOM count by integrating RTC, ADC, PWM, and fan control logic - eliminates need for discrete supervisor ICs and simplifies layout.	Use Scenario: Hosting signed, updatable firmware for platform security services including firmware integrity verification and secure boot handoff. IC Role / Device Role / Timing Role: Root-of-trust anchor executing validated EC code from protected SPI flash; performs cryptographic signature checks prior to host processor initialization. Use Value: Prevents unauthorized firmware modification via hardware-enforced signature validation - mitigates supply-chain attacks targeting EC firmware persistence.
Thermal Management Subsystem	Keyboard & Peripheral Interface Hub
Use Scenario: Real-time fan speed regulation based on multi-zone thermal sensor readings from SMBus-connected thermistors and PECI CPU die sensors. IC Role / Device Role / Timing Role: Dedicated RPM-PWM interface with 3% accuracy from 500–16k RPM; uses TACH1/TACH2 inputs and PWM0–PWM3 outputs for closed-loop control. Use Value: Enables silent fan operation at low loads and rapid thermal response under peak CPU/GPU load - improves acoustic performance and system reliability.	Use Scenario: Scanning 18×8 keyboard matrix, driving four breathing/blink LEDs, and managing PS/2 keyboard/mouse interfaces in clamshell form factors. IC Role / Device Role / Timing Role: Emulates 8042 keyboard controller with mailbox registers and 43 scratch registers; supports PS/2 edge-wake and suspend-mode scanning. Use Value: Delivers "instant-on" keyboard responsiveness from S3/S4 states without host CPU involvement - enhances user experience in always-on mobile devices.

Mobile Notebook Power Management

Secure Embedded Controller Platform

Use Scenario: Managing system-wide power states (S0–S5), thermal throttling, battery charging, and lid-open/closed detection in ultrabook designs.

IC Role / Device Role / Timing Role: Primary ACPI Embedded Controller interfacing with south bridge via LPC; generates SCI/SMI# events and drives RSMRST# for deep-sleep coordination.

Use Value: Reduces platform BOM count by integrating RTC, ADC, PWM, and fan control logic - eliminates need for discrete supervisor ICs and simplifies layout.

Use Scenario: Hosting signed, updatable firmware for platform security services including firmware integrity verification and secure boot handoff.

IC Role / Device Role / Timing Role: Root-of-trust anchor executing validated EC code from protected SPI flash; performs cryptographic signature checks prior to host processor initialization.

Use Value: Prevents unauthorized firmware modification via hardware-enforced signature validation - mitigates supply-chain attacks targeting EC firmware persistence.

Thermal Management Subsystem

Keyboard & Peripheral Interface Hub

Use Scenario: Real-time fan speed regulation based on multi-zone thermal sensor readings from SMBus-connected thermistors and PECI CPU die sensors.

IC Role / Device Role / Timing Role: Dedicated RPM-PWM interface with 3% accuracy from 500–16k RPM; uses TACH1/TACH2 inputs and PWM0–PWM3 outputs for closed-loop control.

Use Value: Enables silent fan operation at low loads and rapid thermal response under peak CPU/GPU load - improves acoustic performance and system reliability.

Use Scenario: Scanning 18×8 keyboard matrix, driving four breathing/blink LEDs, and managing PS/2 keyboard/mouse interfaces in clamshell form factors.

IC Role / Device Role / Timing Role: Emulates 8042 keyboard controller with mailbox registers and 43 scratch registers; supports PS/2 edge-wake and suspend-mode scanning.

Use Value: Delivers "instant-on" keyboard responsiveness from S3/S4 states without host CPU involvement - enhances user experience in always-on mobile devices.

Equivalent & Alternatives

The following parts are listed as comparable options for similar embedded controller applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
MEC1322-LZY-B0	Same die, 132-pin DQFN package (7.0 × 7.0 mm) vs. 144-pin WFBGA; identical electrical specs and firmware compatibility.	Preferred for cost-sensitive or space-constrained PCB layouts where 0.4 mm pitch WFBGA assembly is not available.	Select MEC1322-LZY-B0 when board-level assembly capabilities favor DQFN over fine-pitch WFBGA; no firmware or schematic changes required.
MEC1422-LZY-C0	Successor with enhanced PECI 3.1 support, larger 256KB SRAM, and additional SMBus port; pin-compatible but requires updated firmware and BIOS integration.	Suitable for next-gen platforms requiring higher thermal bandwidth, extended secure boot policies, or additional sensor connectivity.	Choose MEC1422-LZY-C0 only when upgrading to newer platform specifications; not a drop-in replacement due to firmware and BIOS dependencies.

Compared with MEC1322-LZY-B0, the MEC1322-LZY-C0 offers superior board-level miniaturization via WFBGA packaging and improved thermal dissipation, while MEC1422-LZY-C0 extends functionality at the cost of design migration effort - making MEC1322-LZY-C0 optimal for mature, high-volume notebook platforms balancing density, cost, and feature stability.

Availability

MEC1322-LZY-C0 is available at Aetrix Electronics and suitable for notebook PC power management, secure embedded controller deployment, and thermal subsystem integration requiring stable component supply across multi-year production cycles.

Supply support for MEC1322-LZY-C0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and Flash-IP solutions, serving automotive, industrial, communications, and computing markets with vertically integrated silicon and software offerings.

The MEC1322 product line was engineered specifically for x86-based mobile platforms as a secure, ACPI-compliant embedded controller replacement for legacy 8051-based ECs - delivering ARM-class compute, hardware root-of-trust, and integrated peripheral subsystems in a single chip.

FAQ

What is the primary function of the MEC1322-LZY-C0 in a notebook platform?

The MEC1322-LZY-C0 serves as the ACPI-compliant embedded controller responsible for keyboard/mouse interface, system power state management (S0–S5), thermal regulation, battery monitoring, and secure firmware execution. It replaces legacy 8042/8051 ECs with an ARM Cortex-M4 core, enabling richer firmware capabilities while maintaining strict compatibility with Intel LPC and ACPI specifications. Its role is foundational to "instant-on" behavior and platform security in modern notebooks.

Does the MEC1322-LZY-C0 support secure boot, and how is it implemented?

Yes, the MEC1322-LZY-C0 implements hardware-enforced secure boot by validating the digital signature of EC firmware loaded from SPI flash using RSA-2048 encryption and SHA-256 hashing per PKCS#1. This signature check occurs before any EC code executes - including during cold boot and resume-from-suspend - ensuring that only cryptographically authenticated firmware runs. The MEC1322-LZY-C0 contains dedicated cryptographic acceleration logic to perform this check without host CPU involvement.

What package type is used for the MEC1322-LZY-C0, and what are its key mechanical features?

The MEC1322-LZY-C0 uses a 144-ball WFBGA package measuring 6.0 mm × 6.0 mm with 0.4 mm ball pitch. It features separate power domains for VCC1 (core/suspend), VBAT (RTC/backup), and AVCC/AVSS (analog), along with dedicated XTAL1/XTAL2 pins for 32.768 kHz crystal connection. The package supports standard reflow profiles and is qualified for industrial temperature operation (–40°C to +85°C), making it suitable for high-density notebook motherboard layouts.

Can the MEC1322-LZY-C0 operate independently during system suspend states?

Yes, the MEC1322-LZY-C0 is fully operational in S3 (suspend-to-RAM) and deeper low-power states using its dual-supply architecture: VCC1 powers active logic blocks (LPC, timers, GPIO), while VBAT maintains RTC, 64-byte battery-backed RAM, and wake-source circuitry. All major peripherals - including keyboard scan, SMBus hosts, PS/2 interfaces, and fan tachometers - retain full functionality during suspend, enabling true "instant-on" responsiveness without host CPU wake intervention.

What interfaces does the MEC1322-LZY-C0 provide for connecting to thermal sensors and fan actuators?

The MEC1322-LZY-C0 provides four SMBus 2.0 host controllers (supporting 400 kHz and 1 Mbps), a PECI 3.0 interface for CPU die temperature, a 5-channel 10-bit ADC for analog thermistors, and two dedicated tachometer inputs (TACH1/TACH2) with corresponding PWM outputs (PWM0–PWM3). Its RPM-based fan control algorithm operates autonomously using these interfaces - requiring no host CPU polling - and delivers ±3% speed accuracy from 500 to 16,000 RPM.

MEC1322-LZY-C0 Specifications

Product attributes: Attribute value

Manufacturer:: Microchip Technology

Series:: -

Package/Case:: 132-VFQFN Dual Rows, Exposed Pad

Packaging:: Tray

Product Status:: Active

Programmable:: Not Verified

Applications:: Keyboard and Embedded Controller

Core Processor:: ARM® Cortex®-M4

Program Memory Type:: -

Controller Series:: -

RAM Size:: 128K x 8

Interface:: ACPI, BC-Link, I2C/SMBus, LPC, PECI, PS/2, SPI, UART

Number of I/O:: 116

Voltage - Supply:: 3.135V ~ 3.465V

Operating Temperature:: 0°C ~ 70°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 132-DQFN (11x11)

MEC1322-LZY-C0 FAQ

1.How can I place an order for MEC1322-LZY-C0 through Aetrix?

Please submit a Request for Quotation (RFQ) for MEC1322-LZY-C0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for MEC1322-LZY-C0 reliable?

The price and inventory of MEC1322-LZY-C0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MEC1322-LZY-C0 is usually 5 days.

3.What payment methods are accepted for MEC1322-LZY-C0?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MEC1322-LZY-C0 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for MEC1322-LZY-C0?

MEC1322-LZY-C0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your MEC1322-LZY-C0 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for MEC1322-LZY-C0?

For technical support, including MEC1322-LZY-C0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MEC1322-LZY-C0 requirements.

6.How does Aetrix verify that MEC1322-LZY-C0 is sourced from the original manufacturer or authorized distributors?

All MEC1322-LZY-C0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MEC1322-LZY-C0 meets industry standards.

7.What is the process for return or replacement of MEC1322-LZY-C0?

All MEC1322-LZY-C0 units undergo pre-shipment inspection (PSI). If there is an issue with MEC1322-LZY-C0, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The MEC1322-LZY-C0 part is unused and in its original packaging.

Return procedure for MEC1322-LZY-C0:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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