Microchip Technology MEC1408-NU
- Part No.:
- MEC1408-NU
- Manufacturer:
- Microchip Technology
- Category:
- Application Specific Microcontrollers
- Package:
- 128-TQFP
- Datasheet:
-
MEC1408-NU.pdf
- Description:
- IC MEC 192K SRAM 128VTQFP
- Quantity:
- Payment:

- Shipping:

Inventory:3,053
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Product details
Overview
MEC1408-NU from Microchip Technology is a 32-bit ACPI-compliant embedded controller (EC) for notebook and tablet platforms, integrating a MIPS32 M14K™ core, 192 kB on-chip SRAM (code + data), LPC host interface, 106 GPIOs, and full keyboard matrix scan support. It operates at 3.3V, supports Connected Standby, and delivers real-time power management via VTR/VBAT power planes and a 32kHz RTC/Week Timer.
For engineers reviewing the MEC1408-NU datasheet, MEC1408-NU pinout, MEC1408-NU application, or MEC1408-NU equivalent, this device serves as a system-level EC in Windows-based mobile platforms requiring secure boot, PS/2/UART/SMBus peripheral control, thermal monitoring (via 8-channel ADC), and fan regulation (8× PWM + 2× TACH).
Technical Context
The MEC1408-NU implements a dedicated 32-bit MIPS32 M14K microcontroller core with microMIPS instruction set, programmable clock frequencies (1–48 MHz), and deep-sleep debug support via 2-wire ICSP and Trace FIFO Debug Port (TFDP). Its memory subsystem includes 32 kB data SRAM, code SRAM options up to 160 kB (total 192 kB), and 64 B battery-backed SRAM.
It integrates five ACPI-EC interfaces, an 8042-emulated keyboard controller with Port 92 A20M support, and dual 16-bit auto-reloading timers plus a 32-bit RTOS timer running continuously off the 32kHz clock - even during processor sleep - enabling precise wake-up events and sub-second alarm timing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Core Architecture | MIPS32 M14K™ with microMIPS support and hardware multiply/divide unit |
| SRAM Capacity | 192 kB total (code + data), including 32 kB data SRAM and battery-backed 64 B VBAT SRAM |
| LPC Interface | LPC Specification 1.1 compliant; supports CLKRUN#, SERIRQ, SMI#, EC_SCI#; 19.2–33 MHz bus clock |
| ADC/DAC | 8-channel 10-bit ADC (±0.5 LSB INL/DNL, 10 µs conversion); 2-channel 8-bit DAC with external reference |
| PWM/TACH | 8× programmable PWM outputs (16-bit ON/OFF counters); 2× 16-bit tachometer inputs for fan speed sensing |
| Real-Time Timers | 32-bit RTOS timer (32kHz source, runs in all sleep states); hibernation timer (0.5 ms–128 min wake); week timer with sub-second alarms |
| Security | Secure Boot ROM loader supporting 4 firmware images, AES-128 encryption, CRC-32 validation, crisis recovery over keyboard scan pins |
Pinout & Package
MEC1408-NU is housed in a 128-pin VTQFP RoHS-compliant package (14 × 14 mm, 0.4 mm pitch), with pin functions defined across LPC, GPIO, PS/2, SPI, SMBus, UART, ADC, DAC, PWM, TACH, and debug interfaces. Power domains include VCC (main), VTR (standby), and VBAT (battery backup).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| LAD[3:0], LFRAME#, LPCPD#, SERIRQ | LPC Host Interface Signals | Decode LPC I/O and memory cycles; enable host communication per ACPI PME/SCI event signaling |
| KSO[7:0], KSI[17:0] | Keyboard Matrix Scan I/O | Drive and sense 18×8 keyboard matrix; support Pre-Drive mode and internal pull-ups to eliminate external components |
| GPIO[105:0] | General Purpose I/O | 106 pins configurable as input (edge/level wake), push-pull/open-drain output, or analog input; include VTR_33_18 voltage option |
| UART_TX/RX, PS2_CLK/DAT[1:0] | Serial Peripheral Interfaces | Full-duplex NS16C550A-compatible UART (up to 1.5 Mbps); two independent PS/2 controllers operational in main/suspend power |
| ADC_IN[7:0], DAC_OUT[1:0] | Analog I/O Terminals | Support thermistor voltage sensing, power rail monitoring, and DC fan control via 10-bit ADC and 8-bit DAC |
| PWM[7:0], TACH[1:0] | Fan Control Interface | Generate precise PWM waveforms for fan speed regulation; measure tachometer pulses with 16-bit resolution for closed-loop thermal management |
Key Features
| Feature | Design Value |
|---|---|
| Secure Boot ROM Loader | Enables authenticated firmware loading from shared SPI flash with AES-128/CRC-32 verification and crisis recovery over keyboard scan pins |
| 32-bit RTOS Timer | Runs continuously off 32kHz crystal in all chip sleep states - including deep sleep - and generates wake-capable interrupts without CPU involvement |
| Integrated VBAT-Powered Control Interface (VCI) | Provides 2 active-low and 1 active-high VCI inputs plus 1 active-high VCI output for power-button, charger, and AC-OK detection with optional filtering/latching |
| Enhanced Debug Infrastructure | Combines 2-wire ICSP, TFDP trace FIFO, Port 80 BIOS debug port (24-bit timestamp, 16-entry FIFO), and JTAG-compatible breakpoints for production and field diagnostics |
| Peripheral Multiplexing Flexibility | Shares GPIO pins across LPC/eSPI/I2C host interfaces, PS/2, UART, SPI, SMBus, ADC, DAC, PWM, and TACH - configured dynamically by firmware |
Applications
| Ultra-Thin Notebook Power Management | 2-in-1 Tablet System Controller |
|---|---|
Use Scenario: Managing S0ix/S3/S5 transitions, battery charging state, thermal throttling, and lid-open/closed detection in fanless convertible devices. IC Role / Device Role / Timing Role: Primary embedded controller executing ACPI-compliant firmware; provides real-time 32kHz RTC/week timer and hibernation timer for precise wake scheduling. Use Value: Enables <100 µA standby current in Sleep Mode while maintaining sub-second alarm accuracy and battery-backed SRAM retention. |
Use Scenario: Coordinating touch controller power sequencing, stylus proximity wake, display backlight dimming, and USB-C PD negotiation in detachable tablets. IC Role / Device Role / Timing Role: System-level EC interfacing via LPC to PCH; handles PS/2 keyboard/mouse emulation and GPIO-driven sensor fusion logic. Use Value: Delivers 106 GPIOs with edge-triggered wake capability and integrated 8-channel ADC for direct thermistor and voltage rail monitoring - no external supervisor IC required. |
| Windows Connected Standby Platform | Industrial Thin Client Controller |
Use Scenario: Maintaining network connectivity, background telemetry, and instant-on responsiveness during low-power idle states in Always-On PCs. IC Role / Device Role / Timing Role: ACPI-EC managing VTR/VBAT power planes and connected standby signaling via EC_SCI# and SERIRQ; uses PECI 3.0 for CPU thermal reporting. Use Value: Supports mandatory Connected Standby requirements including fast resume (<100 ms), persistent SRAM, and secure boot integrity verification. |
Use Scenario: Replacing legacy Super I/O in ruggedized thin clients requiring extended temperature operation, fanless cooling, and long-life firmware updates. IC Role / Device Role / Timing Role: Standalone I/O controller with 192 kB SRAM for local firmware execution; uses SPI flash loader and AES-128 encrypted firmware images. Use Value: Eliminates external boot ROM and reduces BOM count via integrated secure bootloader, DMA-accelerated SMBus transfers, and hardware CRC-32 generation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar embedded controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MEC1406-NU | 160 kB SRAM (vs. 192 kB); identical 128-VTQFP package, LPC interface, and peripheral set | Suitable for cost-optimized notebooks where firmware footprint remains under 160 kB | Select when firmware size permits reduction in code SRAM allocation without compromising feature enablement |
| MEC1418-NU | Adds Intel eSPI 1.1 compliance and flash channel support; same 192 kB SRAM and 128-VTQFP package | Required for next-gen platforms migrating from LPC to eSPI host interface architecture | Choose when platform design mandates eSPI for reduced pin count, out-of-band messaging, or enhanced security features |
Compared with MEC1406-NU, MEC1408-NU provides 32 kB additional code SRAM for larger firmware stacks or future feature expansion; compared with MEC1418-NU, it omits eSPI but retains full LPC compatibility - simplifying legacy platform integration and reducing firmware complexity.
Availability
MEC1408-NU is available at Aetrix Electronics and suitable for ultra-thin notebook power management, Windows Connected Standby platforms, and industrial thin client controller designs requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.
Supply support for MEC1408-NU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog, FPGA, and mixed-signal solutions, serving automotive, industrial, communications, and computing markets with vertically integrated silicon and software tools.
The MEC140x/1x product line was designed specifically for PC-class embedded controller roles in mobile platforms - delivering ACPI 3.0 compliance, secure boot, and tightly integrated analog/digital I/O to replace discrete Super I/O and reduce system BOM.
FAQ
What is the primary function of the MEC1408-NU in a notebook platform?
The MEC1408-NU serves as the system's ACPI-compliant embedded controller, managing power sequencing (S0–S5), keyboard/mouse interface, thermal monitoring via its 8-channel ADC, fan control using 8× PWM outputs, and real-time clock functions. It executes firmware that interprets host commands over LPC and coordinates low-level hardware behavior - all while maintaining sub-100 µA standby current in VTR/VBAT sleep modes.
Does the MEC1408-NU support eSPI interface, or is it LPC-only?
The MEC1408-NU supports only the LPC host interface - not eSPI. Per the official Microchip DS00001956E datasheet (page 3), MEC1408-NU is explicitly listed with "• LPC • I2C" host interfaces, whereas eSPI support begins with the MEC141x series (e.g., MEC1418-NU). Firmware must configure GPIOs for LPC alternate function, not eSPI.
How much SRAM does the MEC1408-NU provide, and how is it allocated?
The MEC1408-NU provides 192 kB of on-chip SRAM, composed of 32 kB data-optimized SRAM, up to 160 kB code-optimized SRAM, and 64 bytes of battery-backed SRAM. This allocation enables simultaneous execution of complex ACPI firmware, real-time peripheral handling, and non-volatile context storage during VBAT-only operation - all without external memory.
Can the MEC1408-NU operate from battery power alone, and what features remain active?
Yes - the MEC1408-NU is designed for dual-power operation: VTR (standby) and VBAT (battery backup). In VBAT-only mode, it maintains the 32-bit RTOS timer, week timer, 64 B battery-powered SRAM, VCI interface (for power-button detection), BGPO, and power-fail status register - enabling wake-from-RTC, lid-open detection, and battery-backed state retention without main power.
What debug interfaces are available on the MEC1408-NU for firmware development?
The MEC1408-NU offers four complementary debug interfaces: 2-wire ICSP for in-circuit programming, Trace FIFO Debug Port (TFDP) for real-time instruction tracing, Port 80 BIOS Debug Port (with 24-bit timestamp and 16-entry FIFO), and a full NS16C550A-compatible UART accessible by both host and EC. These allow comprehensive firmware validation across boot, runtime, and deep-sleep states.
MEC1408-NU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 128-TQFP
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Applications:
- Keyboard and Embedded Controller
- Core Processor:
- MIPS32® M14K™
- Program Memory Type:
- External Program Memory
- Controller Series:
- -
- RAM Size:
- 192K x 8
- Interface:
- I2C, LPC, SMBus, SPI, UART
- Number of I/O:
- 106
- Voltage - Supply:
- 1.71V ~ 3.465V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 128-VTQFP (14x14)
MEC1408-NU FAQ
1.How can I place an order for MEC1408-NU through Aetrix?
Please submit a Request for Quotation (RFQ) for MEC1408-NU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MEC1408-NU reliable?
The price and inventory of MEC1408-NU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MEC1408-NU is usually 5 days.
3.What payment methods are accepted for MEC1408-NU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MEC1408-NU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MEC1408-NU?
MEC1408-NU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MEC1408-NU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MEC1408-NU?
For technical support, including MEC1408-NU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MEC1408-NU requirements.
6.How does Aetrix verify that MEC1408-NU is sourced from the original manufacturer or authorized distributors?
All MEC1408-NU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MEC1408-NU meets industry standards.
7.What is the process for return or replacement of MEC1408-NU?
All MEC1408-NU units undergo pre-shipment inspection (PSI). If there is an issue with MEC1408-NU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MEC1408-NU part is unused and in its original packaging.
Return procedure for MEC1408-NU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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