Microchip Technology MEC1428-SZ-C1-TR
- Part No.:
- MEC1428-SZ-C1-TR
- Manufacturer:
- Microchip Technology
- Category:
- Application Specific Microcontrollers
- Package:
- 144-WFBGA
- Datasheet:
-
MEC1428-SZ-C1-TR.pdf
- Description:
- SRAM
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MEC1428-SZ-C1-TR from Microchip Technology is an eSPI/LPC dual-mode embedded controller featuring a MIPS32 M14K core, 192 KB SRAM, 108 GPIOs, and support for 1.8V/3.3V I/O-designed for host interface migration in notebook, tablet, and industrial controller platforms.
For engineers reviewing the MEC1428-SZ-C1-TR datasheet, MEC1428-SZ-C1-TR pinout, MEC1428-SZ-C1-TR application, or MEC1428-SZ-C1-TR equivalent, key selection criteria include eSPI channel compliance, dual-voltage I/O capability, PS/2 keyboard/mouse controller count, TACH input count, and WFBGA/VQFP package compatibility with legacy LPC-to-eSPI board transitions.
Technical Context
The MEC1428-SZ-C1-TR implements a dedicated eSPI peripheral supporting all four eSPI channels (peripheral, OEM, flash, and virtual wire), alongside full LPC 1.1 backward compatibility. It integrates PECI 3.0 for CPU thermal telemetry and dual I²C controllers operating at up to 1 MHz.
Its embedded architecture includes a secure boot ROM with CRC-32 and AES-128 encryption, master/slave SPI flash interfaces, and hardware-accelerated key-scan logic for 18×8 matrix keyboards-enabling direct replacement of legacy ECs without firmware rearchitecture.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| eSPI Support | Fully compliant with eSPI specification v1.1, including peripheral, OEM, flash, and virtual wire channels-enables direct integration with Intel/AMD eSPI root complexes. |
| LPC Interface | LPC 1.1 compatible with SIO register mapping-allows reuse of existing BIOS/UEFI LPC initialization sequences during migration. |
| SRAM | 192 KB on-chip SRAM-sufficient for real-time EC firmware, keyboard scan buffers, thermal management stacks, and secure boot verification context. |
| GPIO Count | 108 configurable GPIOs-supports simultaneous PS/2 keyboard/mouse, fan control (PWM/TACH), LED drivers, battery status, and platform-specific debug signals. |
| I/O Voltage | Flexible 1.8V and 3.3V I/O-permits direct interfacing with modern low-voltage peripherals (e.g., 1.8V sensors) while maintaining compatibility with legacy 3.3V SMBus/I²C devices. |
| TACH Inputs | 4 independent tachometer inputs-enables concurrent monitoring of CPU, GPU, chipset, and auxiliary cooling fans in high-density computing platforms. |
| Operating Temp | −40°C to +85°C industrial grade-validated for sustained operation in unventilated industrial controllers and automotive-adjacent edge compute enclosures. |
Pinout & Package
MEC1428-SZ-C1-TR is available in 128-pin WFBGA (7 mm × 7 mm, 0.5 mm pitch) and 128-pin VTQFP (14 mm × 14 mm, 0.4 mm pitch) packages. Pin functions are defined per Microchip DS00002518A, Rev A.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| eSPI_CS# | eSPI Chip Select | Active-low signal asserting eSPI transaction initiation; synchronized to eSPI_CLK for deterministic timing in multi-device eSPI buses. |
| eSPI_CLK | eSPI Clock Input | 20–66 MHz differential-capable clock input driving all eSPI channel timing; supports spread-spectrum modulation for EMI reduction. |
| VCI_IN[1:0] | Voltage Control Interface Inputs | Two analog inputs monitoring system rail voltages (e.g., VCCIN, VCCIO); used by internal ADC for dynamic power state validation and fault detection. |
| TACH[3:0] | Tachometer Inputs | Four open-drain inputs accepting 50–200 kHz pulse trains from fan tach sensors; each mapped to dedicated hardware counters for jitter-free RPM calculation. |
| PWM[7:0] | Pulse Width Modulation Outputs | Eight 8-bit PWM generators with programmable frequency (1 Hz–1 MHz) and dead-time insertion-driving fan speed control, LED dimming, and DC-DC enable sequencing. |
Key Features
| Feature | Design Value |
|---|---|
| Secure Boot ROM | CRC-32 integrity check + AES-128 encrypted firmware image loading-prevents unauthorized EC firmware execution and ensures supply-chain authenticity. |
| Key-Scan Controller | Hardware-accelerated 18×8 matrix scanning with debounce, ghosting suppression, and wake-on-keypress-reduces CPU load and enables instant resume from deep sleep states. |
| PECI 3.0 Interface | Dedicated PECI 3.0 PHY supporting read/write transactions to Intel CPUs for thermal sensor data, throttling status, and processor ID-eliminates need for external PECI transceivers. |
| Flash Interface Flexibility | Supports both master SPI flash (for EC code storage) and slave SPI flash (for shared platform firmware updates)-enables unified BIOS+EC update mechanisms. |
| Debug Access | 2-pin debug port compatible with Microchip's REAL ICE and ICD 3 tools-provides non-intrusive firmware debugging without consuming GPIO or UART resources. |
Applications
| Notebook Platform Management | Industrial SBC Power Control |
|---|---|
Use Scenario: Real-time thermal monitoring, fan speed regulation, keyboard/mouse interface, and battery charge management in thin-and-light notebooks. IC Role / Device Role / Timing Role: Primary embedded controller managing platform power states, executing ACPI-compliant SMI handlers, and coordinating eSPI-based communication with CPU PCH. Use Value: Enables seamless transition from LPC to eSPI while retaining full PS/2 keyboard/mouse support and reducing BOM cost via integrated 108-GPIO flexibility. | Use Scenario: Standalone power sequencing, voltage rail monitoring, watchdog supervision, and remote diagnostics in fanless industrial single-board computers. IC Role / Device Role / Timing Role: System-level power manager handling cold/warm reset coordination, VCC_PWRGD assertion timing, and fail-safe shutdown sequencing across multiple voltage domains. Use Value: Delivers −40°C to +85°C operation with hardware CRC/AES boot security-critical for unattended deployment in factory automation and railway signaling systems. |
| Tablet System Health Monitor | Edge Compute Thermal Manager |
Use Scenario: Battery fuel gauging, touchscreen power gating, ambient light sensor interface, and lid-open detection in convertible tablets. IC Role / Device Role / Timing Role: Low-power companion controller using 1.8V I/O to interface with ultra-low-power sensors and PMICs, entering deep-sleep modes between touch events. Use Value: Dual-voltage I/O eliminates level-shifters for 1.8V sensor interfaces, reducing PCB area and power loss in space-constrained tablet designs. | Use Scenario: Multi-core CPU/GPU thermal telemetry aggregation, dynamic fan curve adjustment, and PECI-driven thermal throttling enforcement in AI inference edge servers. IC Role / Device Role / Timing Role: Real-time thermal coordinator acquiring PECI data from CPU/GPU, correlating with local ADC temperature readings, and updating eight independent PWM outputs within 10 µs latency. Use Value: Four TACH inputs and eight PWMs allow closed-loop control of complex cooling subsystems-meeting ASHRAE A3/A4 environmental requirements for edge deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar embedded controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MEC1418-SZ-C1-TR | Same core, SRAM, and eSPI/LPC support-but only 2 TACH inputs and no 1.8V I/O; uses 144-WFBGA or 128-VTQFP. | Limited to simpler thermal management; unsuitable for multi-fan edge servers requiring 1.8V sensor interfacing. | Select when design requires identical firmware but lower thermal complexity and no 1.8V peripheral integration. |
| ITE IT5570E-AX | LPC-only interface; no eSPI support; 128 KB SRAM; 80 GPIOs; 2 TACH; 3.3V I/O only; different PS/2 controller architecture. | Requires BIOS/LPC stack retention; cannot migrate to eSPI host platforms; lacks PECI 3.0 and secure boot ROM. | Choose only for cost-sensitive LPC-only designs where eSPI roadmap alignment is not required. |
Compared with MEC1418-SZ-C1-TR and ITE IT5570E-AX, the MEC1428-SZ-C1-TR uniquely delivers eSPI readiness, 1.8V/3.3V I/O flexibility, and expanded thermal I/O (4 TACH + 8 PWM) - making it the sole option for next-generation computing platforms targeting Intel/AMD eSPI adoption with industrial-grade reliability.
Availability
MEC1428-SZ-C1-TR is available at Aetrix Electronics and suitable for notebook platform management, industrial SBC power control, and edge compute thermal management requiring stable component supply across extended temperature and long-lifecycle programs.
Supply support for MEC1428-SZ-C1-TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog devices, FPGAs, and embedded controllers-with global manufacturing, quality certification to ISO 9001, and AEC-Q100 qualification capabilities.
The MEC14XX family targets computing platform evolution from LPC to eSPI, delivering secure, low-power, pin-compatible embedded controllers for notebooks, tablets, SBCs, and industrial controllers-enabling seamless host interface migration without firmware rewrite.
FAQ
What host interfaces does the MEC1428-SZ-C1-TR support?
The MEC1428-SZ-C1-TR supports eSPI v1.1 (all four channels), LPC 1.1, I²C (two controllers), PECI 3.0, PS/2 keyboard/mouse, and UART. Its dual-mode eSPI/LPC capability allows gradual migration from legacy LPC designs to modern eSPI host platforms without changing the MEC1428-SZ-C1-TR firmware architecture or PCB layout.
Does the MEC1428-SZ-C1-TR include hardware security features?
Yes, the MEC1428-SZ-C1-TR includes a secure boot ROM with CRC-32 firmware image integrity checking and AES-128 decryption for encrypted firmware loading. This prevents unauthorized code execution and ensures trusted boot in OEM platforms where supply-chain security is mandated, such as industrial and medical computing systems using the MEC1428-SZ-C1-TR.
What is the maximum number of tachometer inputs supported by the MEC1428-SZ-C1-TR?
The MEC1428-SZ-C1-TR supports four independent tachometer inputs (TACH[3:0]), each connected to a dedicated hardware counter for precise RPM measurement. This enables concurrent monitoring of CPU, GPU, chipset, and auxiliary fans-making the MEC1428-SZ-C1-TR ideal for thermally dense edge compute and high-performance notebook platforms.
Can the MEC1428-SZ-C1-TR operate with both 1.8V and 3.3V I/O peripherals?
Yes, the MEC1428-SZ-C1-TR provides flexible I/O voltage support: individual GPIO banks can be configured for either 1.8V or 3.3V operation. This eliminates external level shifters when interfacing with modern 1.8V sensors or legacy 3.3V SMBus devices-directly enhancing design simplicity and power efficiency in systems built around the MEC1428-SZ-C1-TR.
Which development tools are officially supported for the MEC1428-SZ-C1-TR?
Microchip officially supports the MEC1428-SZ-C1-TR with MPLAB XC32 Compiler, MPLAB REAL ICE In-Circuit Emulator, MPLAB ICD 3 Debugger, and PICkit 3 Programmer/Debugger. Demo boards EVB-MEC1428MECC are available for hardware evaluation-ensuring full toolchain compatibility and rapid firmware prototyping for the MEC1428-SZ-C1-TR.
MEC1428-SZ-C1-TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 144-WFBGA
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Applications:
- Keyboard and Embedded Controller
- Core Processor:
- MIPS32® M14K™
- Program Memory Type:
- External Program Memory
- Controller Series:
- -
- RAM Size:
- 192K x 8
- Interface:
- I2C, LPC, SMBus, SPI, UART
- Number of I/O:
- 108
- Voltage - Supply:
- 1.71V ~ 3.465V
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 144-WFBGA (9x9)
MEC1428-SZ-C1-TR FAQ
1.How can I place an order for MEC1428-SZ-C1-TR through Aetrix?
Please submit a Request for Quotation (RFQ) for MEC1428-SZ-C1-TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MEC1428-SZ-C1-TR reliable?
The price and inventory of MEC1428-SZ-C1-TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MEC1428-SZ-C1-TR is usually 5 days.
3.What payment methods are accepted for MEC1428-SZ-C1-TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MEC1428-SZ-C1-TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MEC1428-SZ-C1-TR?
MEC1428-SZ-C1-TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MEC1428-SZ-C1-TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MEC1428-SZ-C1-TR?
For technical support, including MEC1428-SZ-C1-TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MEC1428-SZ-C1-TR requirements.
6.How does Aetrix verify that MEC1428-SZ-C1-TR is sourced from the original manufacturer or authorized distributors?
All MEC1428-SZ-C1-TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MEC1428-SZ-C1-TR meets industry standards.
7.What is the process for return or replacement of MEC1428-SZ-C1-TR?
All MEC1428-SZ-C1-TR units undergo pre-shipment inspection (PSI). If there is an issue with MEC1428-SZ-C1-TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MEC1428-SZ-C1-TR part is unused and in its original packaging.
Return procedure for MEC1428-SZ-C1-TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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