Microchip Technology MEC1723N-B0-I/LJ

Overview

MEC1723N-B0-I/LJ from Microchip Technology is a low-power, ARM® Cortex-M4F-based embedded controller designed for notebook PC and storage enclosure platforms. It integrates 416KB SRAM (352KB code-optimized + 64KB data-optimized), 128 bytes battery-backed SRAM, AES-256/ECDSA/SHA-512 crypto accelerators, and Intel eSPI host interface - enabling secure boot, ACPI S0–S5 power management, and real-time thermal/fan control in space-constrained designs.

For engineers reviewing the MEC1723N-B0-I/LJ datasheet, MEC1723N-B0-I/LJ pinout, MEC1723N-B0-I/LJ application, or MEC1723N-B0-I/LJ equivalent, key selection criteria include its 176-pin WFBGA package, dual-voltage (1.8 V / 3.3 V) GPIO banks, eSPI-compliant host interface with SAFS/MAFS support, and hardware-accelerated secure boot from external SPI flash - all critical for notebook EC firmware development and system-level power orchestration.

Technical Context

The MEC1723N-B0-I/LJ implements a tightly coupled ARM Cortex-M4F core running at up to 48 MHz, backed by 416KB on-chip SRAM and boot ROM containing runtime APIs and secure bootloader logic. Its eSPI interface fully complies with Intel Doc #327432-004 (v1.0) and #562633 (v0.6), supporting all four channels - Peripheral, Virtual Wires, OOB Tunneled Message, and Run-time Flash Access - with up to 66 MHz operation.

Power architecture includes dedicated VBAT, VTR, and VCC supply planes, enabling true instant-on behavior and dual sleep modes (Light Sleep and Heavy Sleep). Hardware security features include immutable secure boot, AES-256 encrypted image loading, ECDSA signature verification, SHA-256 to SHA-512 hash engine, and lockable OTP for key storage - all enforced before firmware execution begins.

Key Specifications

Pinout & Package

MEC1723N-B0-I/LJ is housed in a 176-pin Wafer-Level Fine-Pitch Ball Grid Array (WFBGA) package with 0.4 mm ball pitch and 7.0 mm × 7.0 mm body size. The package supports automated optical inspection (AOI) and reflow-compatible assembly for high-volume notebook manufacturing.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar embedded controller applications.

Compared with MEC1721N-B0-I/LJ, the MEC1723N-B0-I/LJ adds full eSPI SAFS/MAFS bridge logic and retains all crypto accelerators, making it suitable for systems needing secure shared-flash arbitration; versus MEC1727N-B0-I/LJ, it omits internal SPI flash but maintains identical security and power management capabilities - simplifying layout while preserving firmware update security.

Availability

MEC1723N-B0-I/LJ is available at Aetrix Electronics and suitable for ultra-thin notebook EC designs, storage enclosure controllers, and industrial thin clients requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for MEC1723N-B0-I/LJ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology Inc. is a leading provider of microcontroller, mixed-signal, analog, and Flash-IP solutions, serving automotive, industrial, consumer, and communications markets with scalable, secure, and energy-efficient silicon.

The MEC172x product line delivers highly integrated, low-power embedded controllers targeting notebook PC and storage enclosure platforms - combining ARM Cortex-M4F processing, eSPI host interface, hardware security, and intelligent power/peripheral management in a single chip.

FAQ

What is the primary function of the MEC1723N-B0-I/LJ in a notebook platform?

The MEC1723N-B0-I/LJ serves as the embedded controller (EC) managing low-level system functions including keyboard/mouse interface, ACPI power state transitions (S0–S5), thermal monitoring, fan control, battery charging logic, and secure boot orchestration. Its ARM Cortex-M4F core executes firmware that coordinates with the host CPU via eSPI, enabling instant-on behavior and connected standby - making it essential for modern Windows notebook power architecture. The MEC1723N-B0-I/LJ integrates all required peripherals on-die, eliminating need for external support ICs.

Does the MEC1723N-B0-I/LJ support Intel eSPI specification compliance?

Yes, the MEC1723N-B0-I/LJ fully complies with Intel eSPI Specification Base (Doc #327432-004, Rev. 1.0) and Compatibility (Doc #562633, Rev. 0.6) standards. It supports all four eSPI channels - Peripheral, Virtual Wires, OOB Tunneled Message, and Run-time Flash Access - at up to 66 MHz. The MEC1723N-B0-I/LJ implements hardware SAFS/MAFS bridge logic with region-based flash protection, enabling secure multi-master access to shared SPI flash. This compliance ensures drop-in compatibility with Intel 300-series and newer chipsets.

What security features does the MEC1723N-B0-I/LJ provide for secure boot?

The MEC1723N-B0-I/LJ provides hardware-rooted secure boot via its Boot ROM Secure Boot Loader, which authenticates external SPI flash images using ECDSA signatures and SHA-512 hashes before loading. It supports AES-256 encryption of firmware images, RSA keys up to 4096 bits, ECC keys up to 571 bits, and a True Random Number Generator (TRNG). Private keys and IDs are stored in lockable OTP memory with 32-byte boundary protection. These features ensure the MEC1723N-B0-I/LJ enforces immutable code execution and prevents unauthorized firmware modification.

What is the memory configuration of the MEC1723N-B0-I/LJ?

The MEC1723N-B0-I/LJ includes 416KB of on-chip SRAM - partitioned as 352KB optimized for code execution and 64KB optimized for data access - plus 128 bytes of battery-backed SRAM for RTC and alarm registers. It also contains 4K bits of in-circuit programmable OTP for keys and IDs, 128KB of ROM holding boot code and runtime APIs, and supports external SPI flash via its eSPI interface. The MEC1723N-B0-I/LJ does not integrate internal SPI flash, distinguishing it from the MEC1727N-B0-I/LJ variant.

How does the MEC1723N-B0-I/LJ manage power states in notebook systems?

The MEC1723N-B0-I/LJ supports all five ACPI power states (S0–S5) and implements two chip-level sleep modes - Light Sleep and Heavy Sleep - to minimize current draw during system idle. It operates from three independent supply rails: VBAT (battery backup), VTR (suspend rail), and VCC (runtime rail). In Light Sleep, peripherals like RTC and GPIO remain active for wake events; in Heavy Sleep, only VBAT-powered logic stays alive. The MEC1723N-B0-I/LJ achieves sub-10 µA standby current in Heavy Sleep, enabling multi-week battery life in connected standby scenarios.