onsemi MMT10B310T3G
- Part No.:
- MMT10B310T3G
- Manufacturer:
- onsemi
- Category:
- Thyristors
- Package:
- DO-214AA, SMB
- Datasheet:
-
MMT10B310T3G.pdf
- Description:
- THYRISTOR 270V 100A DO-214AA
- Quantity:
- Payment:

- Shipping:

Inventory:9,460
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Product details
Overview
MMT10B310T3G from onsemi is a bidirectional thyristor surge protective device (TSPD) designed for secondary overvoltage protection in telecom line interfaces. It features a 365 V breakover voltage (typ), 100 A 10×1000 µs surge current rating, 270 mA holding current, and SMB (DO-214AA) surface-mount package. It operates across −40°C to +125°C and fails short-circuit when overstressed.
For engineers reviewing the MMT10B310T3G datasheet, pinout, applications, or equivalent options, key selection criteria include bidirectional clamping voltage stability, GR-1089 Level 2 compliance, fail-safe shorting behavior, and compatibility with PPTC-based telecom protection circuits.
Technical Context
The MMT10B310T3G functions as a crowbar-type protector triggered by voltage exceeding its breakover threshold (365 V typ, 400 V max at 25°C). It latches into low-impedance conduction until surge current falls below 270 mA holding current, ensuring sustained clamping during transient events.
Its dv/dt immunity exceeds 2000 V/s, minimizing false triggering from fast-rising noise. Capacitance remains stable at ≤200 pF (1 MHz, 2 Vdc), supporting high-frequency signal integrity in TIP/RING telecom lines without degrading AC performance.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Breakover Voltage (VBO) | 365 V typical, 400 V max - defines precise clamping onset for 310 V-rated telecom systems |
| Surge Current (10×1000 µs) | 100 A peak - withstands IEC/ITU lightning-induced surges per GR-1089 Level 2 |
| Holding Current (IH) | 270 mA max - ensures reliable self-reset after surge decay, preventing latch-up |
| Off-State Leakage (ID2) | 5.0 µA max at VDM = 270 V - minimizes standby power loss in always-on line interfaces |
| Capacitance | ≤200 pF at 1 MHz - preserves voiceband and DSL signal fidelity on TIP/RING pairs |
| dv/dt Immunity | ≥2000 V/s - rejects EFT/burst noise without spurious turn-on |
| Package | SMB (DO-214AA) - industry-standard SMT footprint compatible with automated telecom PCB assembly |
Pinout & Package
SMB package (JEDEC DO-214AA, Case 403C), polarity-free, two-terminal surface-mount device. Dimensions: 4.57 mm × 3.81 mm × 2.11 mm (L × W × H).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| MT1 | Anode/Cathode (bidirectional) | Interchangeable terminal; connects to TIP or RING line - no polarity assignment required |
| MT2 | Anode/Cathode (bidirectional) | Interchangeable terminal; connects to opposite line or ground reference - symmetric conduction path |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional crowbar action | Clamps both positive and negative surges identically without external biasing or polarity constraints |
| Fail-safe short-circuit failure mode | Guarantees continued overvoltage protection even after end-of-life stress, preventing open-circuit exposure |
| Stable voltage limit vs. di/dt | VBO varies <0.08%/°C - maintains consistent clamping across temperature and surge rise rates |
| Pb-free SMB packaging | RoHS-compliant lead finish supports reflow soldering at 260°C peak, aligned with IPC-J-STD-020 |
Applications
| DSL Line Interface Protection | VoIP Gateway TIP/RING Protection |
|---|---|
Use Scenario: Protecting ADSL/VDSL line drivers and receivers from lightning-induced surges on outside-plant copper pairs. IC Role / Device Role / Timing Role: Primary crowbar protector placed between line transformer secondary and PPTC overcurrent device. Use Value: Clamps transients to ≤400 V while sustaining 100 A surge, preserving signal integrity and meeting GR-1089 Level 2 requirements. | Use Scenario: Securing analog telephone interface circuits in residential VoIP adapters against power cross and induction surges. IC Role / Device Role / Timing Role: Bidirectional voltage clamp on TIP/RING lines upstream of codec and isolation transformer. Use Value: Symmetric 365 V breakover ensures equal protection for both line polarities, eliminating need for dual-device solutions. |
| ISDN BRI Line Protection | Central Office Customer Premises Equipment |
Use Scenario: Safeguarding ISDN Basic Rate Interface (2B+D) line cards from longitudinal surges in multi-line business systems. IC Role / Device Role / Timing Role: Secondary surge suppressor coordinated with gas discharge tube (GDT) front-end and PPTC current limiter. Use Value: 2000 V/s dv/dt immunity prevents false triggering during fast-rising ISDN D-channel signaling edges. | Use Scenario: Protecting DSLAM-facing CPE devices (e.g., home gateways) installed at customer premises under Bellcore 1089 and ITU K.20/K.21 mandates. IC Role / Device Role / Timing Role: Final-stage semiconductor protector in cascaded telecom surge architecture (GDT → TSPD → PPTC). Use Value: UL File #E210057 registration and guaranteed 100 A surge capability validate compliance for carrier-approved deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar thyristor surge protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SM10T33CA | 33 V lower breakover voltage (330 V typ); 80 A 10×1000 µs rating; same SMB package | Targeted for 275 V AC mains-derived telecom systems, not 310 V nominal designs | Select only if system VDM is ≤245 V and lower clamping voltage is required |
| MMT10B260T3G | Lower breakover (320 V typ); identical 100 A surge rating, SMB package, and thermal specs | Used where 260 V rated line voltage requires tighter clamping margin before GDT activation | Choose for legacy 260 V telecom infrastructure; verify coordination with upstream GDT holdover voltage |
Compared with SM10T33CA and MMT10B260T3G, the MMT10B310T3G provides the highest breakover voltage in the family-critical for maintaining margin above 310 V nominal line voltages while still triggering before damage thresholds of downstream codecs and transformers.
Availability
MMT10B310T3G is available at Aetrix Electronics and suitable for DSL line interface protection, VoIP gateway TIP/RING protection, and ISDN BRI line protection requiring stable component supply and GR-1089 compliance.
Supply support for MMT10B310T3G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power, analog, sensor, and connectivity solutions for automotive, industrial, cloud, and consumer markets.
The MMT10B310T3G belongs to onsemi's Thyristor Surge Protector (TSPD) product line, engineered specifically for secondary-level overvoltage protection in telecom infrastructure where fail-safe operation and regulatory compliance are mandatory.
FAQ
What is the maximum operating temperature range for the MMT10B310T3G?
The MMT10B310T3G operates across −40°C to +125°C in both blocking and conducting states. Its overload junction temperature is rated to +175°C during transient conduction, enabling reliable deployment in uncontrolled environments such as outdoor telecom cabinets and residential gateways exposed to ambient extremes.
Does the MMT10B310T3G require external biasing or polarity orientation during PCB layout?
No. The MMT10B310T3G is a fully bidirectional device with no polarity marking. MT1 and MT2 terminals are functionally interchangeable, allowing placement in either direction on TIP/RING lines without affecting clamping performance or surge response.
How does the MMT10B310T3G coordinate with PPTC devices in telecom protection circuits?
The MMT10B310T3G is designed to operate in cascade with polymeric PTCs: it clamps high-voltage surges first, then the PPTC limits follow-on current. Its 270 mA holding current ensures the PPTC has sufficient time to trip before the TSPD self-resets, maintaining coordinated protection per Bellcore 1089 architecture.
Is the MMT10B310T3G certified to meet GR-1089 Second Level Surge requirements?
Yes. The MMT10B310T3G is explicitly validated to comply with GR-1089 Second Level Surge specifications using 500 A 2×10 µs and 100 A 10×1000 µs waveforms. This certification is documented in the official onsemi datasheet revision 8 and supports carrier-grade equipment qualification.
What is the failure mode of the MMT10B310T3G under extreme overstress conditions?
The MMT10B310T3G fails short-circuit when subjected to energy beyond its ratings. This fail-safe behavior ensures the protected circuit remains shunted and continues to receive overvoltage protection-even after end-of-life-preventing catastrophic open-circuit exposure of downstream components like line drivers and codecs.
MMT10B310T3G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- DO-214AA, SMB
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Voltage - Breakover:
- 365V
- Voltage - Off State:
- 270V
- Voltage - On State:
- 5 V
- Current - Peak Pulse (8/20µs):
- -
- Current - Peak Pulse (10/1000µs):
- 100 A
- Current - Hold (Ih):
- 150 mA
- Number of Elements:
- 1
- Capacitance:
- 200pF
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SMB
MMT10B310T3G FAQ
1.How can I place an order for MMT10B310T3G through Aetrix?
Please submit a Request for Quotation (RFQ) for MMT10B310T3G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MMT10B310T3G reliable?
The price and inventory of MMT10B310T3G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MMT10B310T3G is usually 5 days.
3.What payment methods are accepted for MMT10B310T3G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MMT10B310T3G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MMT10B310T3G?
MMT10B310T3G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MMT10B310T3G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MMT10B310T3G?
For technical support, including MMT10B310T3G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MMT10B310T3G requirements.
6.How does Aetrix verify that MMT10B310T3G is sourced from the original manufacturer or authorized distributors?
All MMT10B310T3G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MMT10B310T3G meets industry standards.
7.What is the process for return or replacement of MMT10B310T3G?
All MMT10B310T3G units undergo pre-shipment inspection (PSI). If there is an issue with MMT10B310T3G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MMT10B310T3G part is unused and in its original packaging.
Return procedure for MMT10B310T3G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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