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STMicroelectronics SMP100LC-65

Part No.:
SMP100LC-65
Manufacturer:
STMicroelectronics
Category:
Thyristors
Package:
DO-214AA, SMB
Datasheet:
AetrixSMP100LC-65.pdf
Description:
THYRISTOR 65V 400A DO-214AA
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:5,937

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Product details

Overview

SMP100LC-65 from STMicroelectronics is a bidirectional thyristor surge suppressor (TSS) designed for fail-safe overvoltage protection on telecom and data lines. It features a 65 V breakover voltage (VBO), 45 pF capacitance at 2 V, 2 μA max leakage current, 150 mA minimum holding current (IH), and 100 A repetitive peak pulse current (10/1000 μs). It is used in xDSL line cards to prevent signal distortion during lightning-induced surges.

For engineers reviewing the SMP100LC-65 datasheet, SMP100LC-65 pinout, SMP100LC-65 application, or SMP100LC-65 equivalent, key selection criteria include bidirectional crowbar action, low capacitance for high-speed data integrity, fail-safe short-circuit mode under overcurrent, compliance with ITU-T K20/K21 and IEC 61000-4-5, and SMB (DO-214AA) package thermal performance.

Technical Context

The SMP100LC-65 operates as a voltage-triggered silicon-controlled rectifier (SCR) that latches into low-impedance conduction upon exceeding its dynamic breakover voltage (85 V typ.), maintaining conduction until current falls below 150 mA. Its bidirectional structure enables symmetrical clamping on AC or differential data lines without polarity constraints.

It delivers robust surge immunity per GR-1089 Core (first level: 2500 V, 10/1000 μs), ITU-T K20 (6000 V, 10/700 μs), and IEC 61000-4-5 (4000 V, 10/700 μs), with thermal resistance Rth(j-a) = 100 °C/W and Rth(j-l) = 20 °C/W enabling reliable power dissipation in compact SMB footprints.

Key Specifications

ParameterValue and Actual Design Meaning
Breakover Voltage (VBO)85 V (typical); triggers crowbar conduction before downstream ICs experience destructive overvoltage
Capacitance (C)45 pF at 2 V; preserves signal integrity on 100 Mbps+ xDSL/Ethernet lines
Leakage Current (IR)2 μA max at 55 V; avoids DC loading or false triggering in standby
Holding Current (IH)150 mA min; ensures sustained clamping until fault current decays below safe threshold
Peak Pulse Current (IPP)100 A (10/1000 μs); withstands multi-kA lightning surges after series impedance limiting
Junction Temp Range–40 °C to +150 °C; supports operation in uncontrolled industrial/telecom cabinets
PackageSMB (DO-214AA); JEDEC-registered surface-mount outline with UL94 V0 epoxy

Pinout & Package

SMP100LC-65 uses the SMB (DO-214AA) package: 3.3–3.95 mm width, 5.1–5.6 mm length, 1.9–2.45 mm height, with gull-wing leads and 260 °C soldering tolerance. Thermal resistance is 100 °C/W junction-to-ambient (with recommended footprint) and 20 °C/W junction-to-leads.

Pin/TerminalCircuit RoleDesign Meaning
Anode (A)Current entry during positive half-cycle conductionEnables bidirectional surge clamping when paired with Cathode
Cathode (K)Current exit during positive half-cycle; entry during negative half-cycleCompletes SCR latch path; symmetric terminal enables AC/differential line use

Key Features

FeatureDesign Value
Bidirectional crowbar protectionLatches into low-impedance state for both polarities-no external diode bridge needed
Fail-safe short-circuit modeGuarantees hardware-level shutdown under overcurrent, preventing latent failure modes
Low 45 pF capacitance at 2 VMinimizes insertion loss and phase distortion on 1–100 MHz data lines
UL497B recognition & UL94 V0 epoxyMeets safety certification requirements for telecom interface circuits without additional coating
Compliance with GR-1089 Core, ITU-T K20/K21Validated for first-level telecom surge immunity without derating or external filtering

Applications

DSL Line Card ProtectionEthernet PHY Interface Protection

Use Scenario: Protects ADSL/VDSL line drivers and receivers from induced lightning surges on twisted-pair copper loops.

IC Role / Device Role / Timing Role: Bidirectional crowbar clamping device placed between transformer secondary and PHY IC input pins.

Use Value: 45 pF capacitance prevents degradation of 30 MHz upstream/downstream signal bandwidth while sustaining 100 A surge pulses.

Use Scenario: Shields 10/100BASE-TX Ethernet magnetics secondary windings and PHY transceivers from ESD and AC power cross-talk.

IC Role / Device Role / Timing Role: Fail-safe transient voltage suppressor installed across differential pairs prior to common-mode chokes.

Use Value: 150 mA holding current ensures stable clamping during 1.2/50 μs surges, avoiding premature recovery and re-strike.

Telecom Central Office DSLAM ProtectionIndustrial RS-485 Data Line Protection

Use Scenario: Guards multi-port DSL access multiplexer (DSLAM) line cards against repeated surges in outdoor cabinet environments.

IC Role / Device Role / Timing Role: Primary surge arrestor in first-level protection stage, upstream of gas discharge tube (GDT) and PTC.

Use Value: Complies with GR-1089 Core first-level (2500 V, 10/1000 μs) without external coordination components.

Use Scenario: Secures long-haul RS-485 bus nodes in factory automation systems exposed to motor drive noise and ground potential differences.

IC Role / Device Role / Timing Role: Low-capacitance TSS placed across A/B differential lines at each node's physical layer interface.

Use Value: 2 μA max leakage avoids bias current errors in high-impedance termination networks while enabling >10 kV ESD immunity.

Equivalent & Alternatives

The following parts are listed as comparable options for similar thyristor surge suppressor applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
SMCJ6.0AUnidirectional TVS diode; 6.0 V standoff, 100 A (8/20 μs); no latching behaviorRequires external series resistor and polarity management; unsuitable for AC or differential lines without duplicationSelect only for low-voltage DC rails where crowbar action is unnecessary and fast response dominates
P6KE68CABi-directional TVS; 68 V standoff, 100 A (8/20 μs); higher capacitance (~150 pF)Causes measurable signal attenuation above 10 MHz; not certified to GR-1089 or ITU-T K20Acceptable for legacy analog telecom interfaces but not for xDSL/Ethernet data rate preservation

Compared with SMCJ6.0A and P6KE68CA, SMP100LC-65 uniquely combines bidirectional crowbar latching, sub-50 pF capacitance, and telecom-grade surge certifications-enabling single-device, polarity-agnostic protection on high-speed digital lines without signal integrity compromise.

Availability

SMP100LC-65 is available at Aetrix Electronics and suitable for DSL line card design, Ethernet PHY interface hardening, telecom central office equipment, and industrial RS-485 network deployment requiring stable component supply and long-term lifecycle assurance.

Supply support for SMP100LC-65 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power devices, sensors, and protection ICs for industrial, automotive, and communications markets.

The SMP100LC series belongs to ST's Telecom Circuit Protector product line, engineered specifically to meet GR-1089, ITU-T K20/K21, and IEC 61000-4-5 requirements for fail-safe, low-capacitance surge suppression on high-data-rate copper interfaces.

FAQ

What is the fail-safe behavior of SMP100LC-65 during overcurrent?

When subjected to surge currents exceeding its non-repetitive rating (e.g., 5 kA in fail-safe mode), SMP100LC-65 latches into a permanent low-resistance short circuit, physically isolating the protected circuit from further overvoltage. This behavior is intrinsic to its thyristor structure and does not require external control logic or reset mechanisms.

Does SMP100LC-65 require a series current-limiting resistor in telecom applications?

Yes-a series resistor is required to limit post-trigger current below the device's 150 mA holding threshold and prevent thermal runaway. Typical values range from 1 Ω to 10 Ω depending on line impedance and expected surge energy, as defined in GR-1089 Core test configurations.

How does SMP100LC-65 differ from standard TVS diodes in surge response?

Unlike TVS diodes that clamp and recover, SMP100LC-65 acts as a crowbar: it triggers at 85 V, then latches into near-zero voltage drop until current falls below 150 mA. This eliminates clamping voltage overshoot and provides deterministic, low-impedance fault clearing-critical for protecting sensitive PHY ICs.

Is SMP100LC-65 compatible with lead-free reflow soldering processes?

Yes-SMP100LC-65 uses lead-free plating and halogen-free molding resin, and its SMB package is rated for maximum lead temperature of 260 °C for 10 seconds, fully compliant with IPC/JEDEC J-STD-020D moisture sensitivity and lead-free reflow profiles.

SMP100LC-65 Specifications

Product attributes
Attribute value
Manufacturer:
STMicroelectronics
Package/Case:
DO-214AA, SMB
Series:
SMP, TRISIL™
Packaging:
Tape & Reel (TR)
Product Status:
Active
Voltage - Breakover:
85V
Voltage - Off State:
65V
Voltage - On State:
-
Current - Peak Pulse (8/20µs):
400 A
Current - Peak Pulse (10/1000µs):
100 A
Current - Hold (Ih):
150 mA
Number of Elements:
1
Capacitance:
90pF
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
SMB

SMP100LC-65 FAQ

1.How can I place an order for SMP100LC-65 through Aetrix?

Please submit a Request for Quotation (RFQ) for SMP100LC-65 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SMP100LC-65 reliable?

The price and inventory of SMP100LC-65 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SMP100LC-65 is usually 5 days.

3.What payment methods are accepted for SMP100LC-65?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SMP100LC-65 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SMP100LC-65?

SMP100LC-65 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SMP100LC-65 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SMP100LC-65?

For technical support, including SMP100LC-65 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SMP100LC-65 requirements.

6.How does Aetrix verify that SMP100LC-65 is sourced from the original manufacturer or authorized distributors?

All SMP100LC-65 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SMP100LC-65 meets industry standards.

7.What is the process for return or replacement of SMP100LC-65?

All SMP100LC-65 units undergo pre-shipment inspection (PSI). If there is an issue with SMP100LC-65, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SMP100LC-65 part is unused and in its original packaging.

Return procedure for SMP100LC-65:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

SMP100LC-65 Tags

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