Monolithic Power Systems Inc. MP1906DS-LF-Z

Overview

MP1906DS-LF-Z from Monolithic Power Systems is an 80V half-bridge gate driver IC designed to control two external N-channel MOSFETs in high-efficiency DC-DC converters. It features independent HPWM/LPWM inputs, 150ns internal dead time, 80ns propagation delay, <90μA quiescent current, and under-voltage lockout on both VCC and bootstrap rails-enabling reliable operation in telecom power supplies up to 80V input.

For engineers reviewing the MP1906DS-LF-Z datasheet, MP1906DS-LF-Z pinout, MP1906DS-LF-Z application, or MP1906DS-LF-Z equivalent, this page delivers verified electrical parameters, SOIC-8 terminal mapping, shoot-through prevention behavior, thermal limits, and real-world use cases in active-clamp forward and half-bridge motor drive topologies.

Technical Context

The MP1906DS-LF-Z integrates a level-shifted high-side driver with bootstrap supply management and independent logic-level inputs. Its functional block includes UVLO monitoring for both VCC (8.2–9.4V threshold) and BT (4.5–6.5V), shoot-through prevention via input-signal-overlap logic, and fixed 150–250ns dead time between TG and BG transitions.

It operates with 10–16V gate drive supply, supports 3.3V/5V logic inputs, and delivers ±1A peak sink/source current per channel. The device maintains stable output states during undervoltage conditions by forcing both TG and BG low, and requires external 1µF ceramic bootstrap capacitor between BT and SW pins.

Key Specifications

Pinout & Package

MP1906DS-LF-Z is housed in an industry-standard 8-pin SOIC package (JEDEC MS-012, variation AA) with 1.27mm pitch, 3.8–4.0mm width, and 5.8–6.2mm length. Thermal resistance θ_JA = 90°C/W on 4-layer PCB.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar half-bridge gate driver applications.

Compared with IR2104S and LM5109BMAX, MP1906DS-LF-Z offers superior 80V bus capability, hardware-enforced dead time, and dual-rail UVLO-making it optimal for high-reliability, high-input-voltage half-bridge designs where timing precision and fault resilience are critical.

Availability

MP1906DS-LF-Z is available at Aetrix Electronics and suitable for telecom DC-DC converters, avionics power supplies, and industrial motor drives requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for MP1906DS-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan, and global manufacturing partnerships.

The MP1906 belongs to MPS's high-voltage gate driver product line, engineered specifically for efficient, reliable switching in isolated and non-isolated DC-DC topologies operating up to 80V input, with emphasis on shoot-through immunity and thermal robustness.

FAQ

What is the maximum allowable voltage on the SW pin?

The SW pin supports up to +80V continuously, with transient tolerance to −0.3V (or −5V for ≤10ns). This rating enables direct use in 48V telecom and 28V avionics systems with adequate surge margin. Exceeding 80V risks permanent damage per absolute maximum ratings.

Does MP1906DS-LF-Z require external bootstrap diode?

No external bootstrap diode is required. The internal bootstrap circuitry charges the external 1µF ceramic capacitor from VCC through an integrated diode when BG is high and SW is near GND. This simplifies layout and reduces BOM count compared to discrete bootstrap solutions.

How does the input-signal-overlap protection work?

Internal logic monitors HPWM and LPWM simultaneously; if both inputs go high within the same clock cycle, the driver forces both TG and BG low for the duration. This hardware-based blocking eliminates shoot-through risk even with imperfect controller timing or noise-induced glitches.

Can MP1906DS-LF-Z drive P-channel high-side MOSFETs?

No-it is designed exclusively for N-channel high-side and low-side MOSFETs. The TG output is a high-side source driver referenced to SW, not a grounded-source driver. Driving P-MOSFETs would require inverted logic and incompatible gate voltage referencing.

What is the recommended bootstrap capacitor value and type?

A 1µF X7R or C0G ceramic capacitor placed directly between BT and SW pins is specified. Ceramic dielectrics ensure low ESR/ESL for effective high-frequency charge transfer; tantalum or electrolytic capacitors are not recommended due to higher impedance and reliability concerns.

Is there a version with enhanced ESD protection?

The MP1906DS-LF-Z meets standard HBM ESD specifications (≥2kV) per JEDEC JESD22-A114. No factory variant with upgraded ESD rating (e.g., ≥4kV) is documented in the MP1906 family datasheet or MPS product selector guide.

What happens during VCC UVLO condition?

When VCC drops below 8.2V (rising threshold), both TG and BG outputs are immediately pulled low and held low until VCC rises above 8.8V and a rising edge occurs on either HPWM or LPWM. This prevents partial turn-on and thermal runaway during brown-out events.