Monolithic Power Systems Inc. MP1917AGR-Z

Overview

MP1917AGR-Z from Monolithic Power Systems is a high-frequency, half-bridge N-channel MOSFET gate driver with independent high-side and low-side control, 100V SW voltage rating, 4A peak sink/source capability per channel, and <5ns inter-channel propagation delay matching. It integrates a bootstrap diode and supports telecom and avionics DC/DC converters operating up to 100V input.

For engineers reviewing the MP1917AGR-Z datasheet, MP1917AGR-Z pinout, MP1917AGR-Z application, or MP1917AGR-Z equivalent, key selection criteria include bootstrap voltage range (115V), UVLO thresholds (6.8V VDD / 6.5V BST-SW), TTL-compatible inputs, 20ns typical propagation delay, and QFN-10 thermal performance (θJA = 47°C/W).

Technical Context

The MP1917AGR-Z implements dual independent drivers: a grounded low-side channel (DRVL) and a floating high-side channel (DRVH) referenced to the switching node (SW), enabled by internal level-shifting and an integrated bootstrap diode. Its architecture enforces shoot-through prevention via separate INL/INH inputs requiring externally managed dead time.

UVLO protection operates independently on both VDD and BST–SW rails, forcing outputs low when either supply drops below 6.8V (VDD) or 6.5V (BST–SW). The device sustains 100V SW voltage with <50V/ns slew rate compliance and delivers 15ns rise/fall times into 2.2nF loads at 12V VDD.

Key Specifications

Pinout & Package

MP1917AGR-Z is housed in a thermally enhanced QFN-10 (4mm × 4mm) package with exposed thermal pad. Pin 9 serves as both VSS and the exposed pad connection point, requiring direct PCB copper tie to ground for optimal thermal performance and noise immunity.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar half-bridge gate driver applications.

Compared with IRS21844STRPBF and LM5113SDX/NOPB, MP1917AGR-Z uniquely combines integrated bootstrap diode, <5ns channel matching, and dual-rail UVLO in a compact QFN-10-making it optimal for space-constrained, high-frequency telecom and avionics half-bridges where timing precision and component count matter.

Availability

MP1917AGR-Z is available at Aetrix Electronics and suitable for isolated brick power, telecom half-bridge power supplies, and avionics DC/DC converters requiring stable component supply, full traceability, and long-term lifecycle support.

Supply support for MP1917AGR-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, including DC/DC converters, LED drivers, motor drivers, and gate drivers.

The MP1917AGR-Z belongs to MPS's high-frequency gate driver product line, engineered specifically for high-efficiency, high-density isolated and non-isolated DC/DC topologies operating up to 100V input with strict timing and thermal constraints.

FAQ

What is the maximum allowable SW node voltage slew rate for reliable MP1917AGR-Z operation?

The datasheet specifies a maximum SW slew rate of <50V/ns to prevent false triggering of internal level-shift circuitry and ensure stable high-side driver operation. Exceeding this rate may cause erratic DRVH behavior or premature UVLO activation due to capacitive coupling onto BST or SW pins.

Can MP1917AGR-Z drive both high-side and low-side MOSFETs simultaneously in a two-switch forward configuration?

Yes-INH and INL can be driven by the same PWM signal to enable simultaneous turn-on/turn-off of both MOSFETs. This mode is explicitly supported in the datasheet's Two-Switch Forward Converter reference design, with timing verified up to 100V input and 500kHz switching.

Does the integrated bootstrap diode support bidirectional current flow during bootstrap capacitor recharge?

No-the internal diode is unidirectional and only conducts from VDD to BST during the low-side conduction phase. It does not conduct reverse current; the BST capacitor recharges solely through this forward path, eliminating need for external diode but requiring proper timing to avoid reverse bias.

What is the minimum recommended dead time between INH and INL signals to prevent shoot-through?

The datasheet does not specify a fixed minimum dead time, but recommends "sufficient" dead time based on measured TMON (1–5ns) and TMOFF (1–5ns) matching tolerances. For 100V operation with 4.5A drive strength, ≥50ns dead time is empirically validated in reference designs to ensure margin against propagation skew and MOSFET tail current.

How is thermal performance affected if the exposed pad (Pin 9) is not soldered to a ground plane?

Without soldering the exposed pad to ≥2cm² copper area, θJA degrades from 47°C/W to >80°C/W, causing junction temperature to exceed 150°C at <1W dissipation. This triggers thermal shutdown and risks permanent damage-full pad connection is mandatory for rated operation.

Is MP1917AGR-Z compatible with 3.3V logic controllers without level shifting?

Yes-its INH and INL inputs have TTL-compatible thresholds (VIH = 2.4V min, VIL = 1.4V max), allowing direct interface with 3.3V microcontrollers and PWM ICs. No external level shifter is needed, though noise filtering is recommended in high-dV/dt environments.