Monolithic Power Systems Inc. MP6539BGV-P

Overview

MP6539BGV-P from Monolithic Power Systems is a 100V three-phase BLDC motor pre-driver IC designed to control six N-channel MOSFETs in half-bridge configurations. It delivers 0.8A source / 1A sink gate drive, integrates a current-sense amplifier (20× gain), supports adjustable dead-time control (77ns–6µs), and operates with VDD = 8.5–14V for use in e-bike motor controllers where compact thermal management and fault-aware operation are critical.

For engineers reviewing the MP6539BGV-P datasheet, MP6539BGV-P pinout, MP6539BGV-P application, or MP6539BGV-P equivalent, key selection considerations include bootstrap capacitor pre-charge timing, VBST UVLO threshold (6.2V), nFAULT open-drain behavior, thermal shutdown at 150°C, and absence of over-current protection compared to MP6539.

Technical Context

The MP6539BGV-P implements independent high-side/low-side gate drivers per phase with internal charge pump support to sustain BST voltage during extended high-side conduction. Its logic interface accepts standard TTL-level inputs (VIH = 2V, VIL = 0.8V) and enforces shoot-through prevention via programmable dead-time using an external resistor on DT pin.

It features integrated current sensing referenced to LSS with 20× fixed gain and requires ≥1nF CSO-to-GND capacitance for stability. Protection functions include VDD UVLO (7.5V rising), VBST UVLO (6.2V), and thermal shutdown (150°C), but omits over-current detection and auto-bootstrap charging found in MP6539.

Key Specifications

Pinout & Package

MP6539BGV-P is housed in a thermally enhanced QFN-28 (4mm × 5mm) package with exposed thermal pad soldered to PCB ground plane for efficient heat dissipation. Pin numbering follows standard QFN top-view layout with pin 1 at top-left corner.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar three-phase BLDC pre-driver applications.

Compared with MP6539GF, MP6539BGV-P reduces startup time (70µs vs. ~1ms) and simplifies layout by removing VIN/LDO, but requires MCU-managed bootstrap pre-charge. Against DRV8305PWP, it offers lower system cost and analog current sensing out-of-box, yet lacks digital configurability and integrated power rails.

Availability

MP6539BGV-P is available at Aetrix Electronics and suitable for e-bike motor controllers, cordless power tools, and industrial fan drivers requiring stable component supply, RoHS-compliant packaging, and long-term lifecycle support.

Supply support for MP6539BGV-P includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with design focus on efficiency, integration, and thermal robustness.

The MP6539B product line targets cost-sensitive, thermally constrained BLDC motor drive applications - delivering gate drive functionality with integrated sensing and protection in minimal footprint packages.

FAQ

What is the minimum recommended bootstrap capacitor value for MP6539BGV-P?

The minimum bootstrap capacitor depends on MOSFET gate charge (Q_T), VDD, and acceptable voltage drop (ΔV_BOOT). Using C_BOOT ≥ Q_T / (ΔV_BOOT − V_FBOOT) with V_FBOOT = 1.2V, a 50nC MOSFET at 12V and 10V minimum gate drive yields ≥62nF. MPS recommends 100–220nF ceramic capacitors with DC bias derating considered.

Does MP6539BGV-P support automatic bootstrap capacitor charging at startup?

No. Unlike MP6539, MP6539BGV-P does not implement auto-bootstrap charging. The MCU must manually pre-charge each bootstrap capacitor by pulsing the corresponding LSx pin low before enabling high-side switching - typically one phase at a time with 20% duty cycle for large capacitors (>220nF).

How does the nFAULT pin behave during different fault conditions?

nFAULT is an open-drain output pulled low during VDD UVLO, VBST UVLO, or thermal shutdown. It remains low until the fault condition clears and internal latches reset. External pull-up (typically 10kΩ to VDD) is required. No separate assertion occurs for over-current, as that protection is omitted in MP6539BGV-P.

Can MP6539BGV-P drive both N-channel and P-channel high-side MOSFETs?

MP6539BGV-P is designed exclusively for N-channel high-side MOSFETs using bootstrap or charge-pump gate drive. It does not support P-channel high-side configurations, which require negative gate drive or level-shifting - incompatible with its architecture and pinout.

What is the purpose of the LSS pin, and how should it be connected?

LSS is the low-side current sense return node. It connects to the ground side of the shared low-side shunt resistor. If current sensing is unused, LSS must be tied directly to GND. When active, voltage across the shunt (LSS–GND) is amplified 20× to CSO, requiring ≥1nF capacitor from CSO to GND for loop stability.

Is there a difference in thermal performance between QFN-28 and TSSOP-28 packages?

Yes. The QFN-28 (4mm×5mm) has θ_JA = 40°C/W and θ_JC = 9°C/W, while the TSSOP-28 EP (9.7mm×6.4mm) achieves θ_JA = 32°C/W and θ_JC = 6°C/W on a 4-layer PCB. TSSOP offers better board-level heat spreading, but QFN provides superior junction-to-case transfer when the exposed pad is properly soldered to a large copper area.

How is dead-time configured, and what happens if the DT pin is left floating?

Dead-time is set by connecting a resistor between DT and GND. Using t_DEAD(µs) = 0.044 × R_DT(kΩ) + 0.1, a 100kΩ resistor yields ~4.5µs. If DT is left floating, the internal default is 6µs; if tied directly to GND, minimum 77ns is applied. No external capacitor is needed.