Monolithic Power Systems Inc. MP8005DF-LF
- Part No.:
- MP8005DF-LF
- Manufacturer:
- Monolithic Power Systems Inc.
- Category:
- Power Over Ethernet (PoE) Controllers
- Package:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Datasheet:
-
MP8005DF-LF.pdf
- Description:
- IC POE CNTRL 1 CHANNEL 20TSSOPF
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
MP8005DF-LF from Monolithic Power Systems is an IEEE 802.3af-compliant Powered Device (PD) interface and PWM controller for PoE-powered systems. It integrates detection, classification, inrush current limiting, thermal protection, and a synchronous buck controller with 100V/1Ω integrated main switch, 460mA temperature-compensated current limit, and user-programmable output voltage via external resistor divider. Used in VoIP telephones and security camera systems requiring isolated 13W PoE power delivery.
For engineers reviewing the MP8005DF-LF datasheet, MP8005DF-LF pinout, MP8005DF-LF application, or MP8005DF-LF equivalent, this page provides verified technical context, real-world design meanings of key specs, validated pin functions, confirmed alternative parts with functional differences, and supply support for industrial PoE deployments.
Technical Context
The MP8005DF-LF implements full IEEE 802.3af PD functionality: 25kΩ detection resistance, 10.2–13V classification turn-on threshold, and 21–23V turn-off threshold with hysteresis. Its dual-gate driver architecture supports isolated synchronous rectification with programmable delay (40–200ns via RDELAY) to prevent cross-conduction.
It features integrated thermal shutdown at 150°C, foldback current limiting during overload, and UVLO at 38–42V (rising) with 1.4V diode-drop compensation. The error amplifier delivers 0.26–0.46 mA/V transconductance and 0.28–0.36 V/V translator gain, enabling stable regulation across 220–300 kHz switching frequency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDD Range | 0–57V input: supports full PoE voltage envelope including PSE transient surges up to 57V. |
| Switching Frequency | 220–300 kHz: enables compact magnetics and EMI filtering while maintaining efficiency above 80% at 2.6A load. |
| FB Voltage | 0.794–0.847 V: precise reference for output voltage setting; 0.818V typical enables accurate ±1% regulation with external divider. |
| Main Gate Drive | 16Ω sourcing / 5.0Ω sinking: drives low-Qg MOSFETs (e.g., <10 nC @ 10V) with fast edge rates and minimal shoot-through risk. |
| Current Limit | 360–460 mA (ISENSE = 165–215 mV): sets maximum RTN-side current during startup and fault conditions to protect upstream PSE and internal switch. |
| Thermal Shutdown | 150°C junction: triggers automatic shutdown under sustained overload or poor PCB thermal design; resets only after VRTN drops below 10.8V. |
| PG Latchoff Threshold | 9.5–10.5V rising / 1.2V falling: ensures clean power-good assertion only after VRTN stabilizes near input rail, avoiding false enable during inrush. |
Pinout & Package
TSSOP-20-EP package with exposed thermal pad; 0.65 mm pitch, 6.5 mm × 4.4 mm body, JEDEC MO-153 compliant. Exposed pad must be soldered to PCB ground plane for thermal performance (θJC = 50°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 VCC | Shunt regulator supply | 10V internal shunt supplies controller logic; decoupled with ≥1µF ceramic to AGND. |
| 2 MAINGATE | Main switch gate drive | Drives high-side MOSFET source-connected to VDD; requires low-inductance layout to minimize ringing. |
| 3 SYNCGATE | Synchronous rectifier gate drive | Drives low-side synchronous FET; timing delay set by RDELAY prevents shoot-through. |
| 4 CSS | Soft-start ramp capacitor | Controls inrush current slew rate; 1nF–10nF typical sets startup time to ~1–10ms. |
| 5 ENABLE | Regulator on/off control | Active-high input; 1.15–1.35V threshold allows direct microcontroller GPIO or optocoupler interface. |
| 7 CLASS | Classification resistor terminal | Connects to RCLASS (e.g., 4.42kΩ) to signal Class 3 (12.95W) to PSE per IEEE 802.3af Table 33. |
| 8 DET | Detection resistor terminal | Connects to RDET (26.1kΩ) to present 25kΩ signature during PSE detection phase. |
| 9 VSS | Ethernet negative return | Isolated ground reference for DET/CLASS circuitry; separate from AGND/RTN to avoid noise coupling. |
| 12,13 RTN | Powered device negative power terminal | High-current return path for PoE input; must be wide copper pour tied to exposed pad for thermal management. |
| 14 PG | Power good indicator | Open-drain active-low output; pulled up externally to indicate stable VRTN >9.5V and ready-to-regulate state. |
| 15 VDD | PoE positive input | Accepts 0–57V DC from PSE; includes internal 100V-rated switch and UVLO with hysteresis. |
| 16 COMP | Compensation node | Connects Type II compensation network (e.g., 10kΩ + 1nF + 100pF) to stabilize loop response. |
| 17 VFB | Voltage feedback input | Monitors output via resistive divider; 0.818V reference enables 3.3V, 5V, or 12V outputs with standard ratios. |
| 18 RDELAY | Sync-to-main gate delay resistor | Grounded resistor (0–200kΩ) sets 40–200ns delay to align gate transitions and avoid cross-conduction. |
| 19 ISENSE | Main switch current sense | Monitors RTN-side current via sense resistor; 200mV full-scale enables 460mA max current limit with margin. |
| 20 AGND | Controller analog ground | Reference for VFB, COMP, ISENSE; must be star-connected to RTN and decoupled locally to minimize noise. |
Key Features
| Feature | Design Value |
|---|---|
| IEEE 802.3af compliance | Fully implements detection (25kΩ), classification (Class 0–4), and inrush limiting per Clause 17 without external components. |
| Integrated 100V/1Ω main switch | Eliminates external high-voltage MOSFET; reduces BOM count and layout area while supporting 57V PSE surges. |
| Programmable synchronous gate delay | RDELAY pin enables precise timing alignment between SYNCGATE and MAINGATE to prevent shoot-through in isolated topologies. |
| Temperature-compensated current limit | 460mA max limit adjusts with die temperature to maintain consistent fault protection across –40°C to +125°C ambient. |
| Thermal foldback protection | Reduces output current during overtemperature events instead of hard shutdown, allowing graceful recovery under transient loads. |
Applications
| VoIP Telephones | Network Cards |
|---|---|
|
Use Scenario: Powering IP desk phones over Category 5e Ethernet cabling in enterprise offices. IC Role / Device Role / Timing Role: PD interface controller managing detection, classification, and DC-DC conversion from 48V PoE to 3.3V/5V system rails. Use Value: Enables single-cable deployment with guaranteed 13W power delivery, eliminating local AC adapters and reducing installation cost. |
Use Scenario: Adding PoE capability to PCIe or M.2 network interface cards for remote management and firmware updates. IC Role / Device Role / Timing Role: Primary PD controller handling PSE handshake and providing regulated 12V/5V for PHY and MAC ICs. Use Value: Supports hot-plug detection and Class 3 power negotiation (12.95W), ensuring compatibility with legacy and modern PSEs. |
| Security Camera Systems | Remote Internet Power |
|
Use Scenario: Powering outdoor PTZ cameras with IR illumination and video streaming over long Ethernet runs (>100m). IC Role / Device Role / Timing Role: Isolated PoE PD controller driving synchronous flyback converter to generate 12V for motor control and 3.3V for SoC. Use Value: Delivers stable 13W even at 57V input with thermal foldback, preventing shutdown during IR LED burst current peaks. |
Use Scenario: Providing backup power to IoT gateways and wireless access points in locations lacking AC infrastructure. IC Role / Device Role / Timing Role: Core PD controller enabling seamless failover from mains to PoE during outages via PG signal monitoring. Use Value: Maintains continuous operation through PSE-initiated power cycling; PG output asserts only after VRTN stabilizes within 100mV of VDD. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PoE PD interface applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LT4275AIMSE#PBF | Higher integration: includes integrated 100V Hot Swap MOSFET and digital classification; requires external oscillator for sync delay. | Supports IEEE 802.3at (PoE+) with 25.5W capability; lacks built-in synchronous gate driver. | Choose for PoE+ systems needing higher power and digital diagnostics; requires additional gate driver for synchronous rectification. |
| NCP1094DR2G | Analog-only classification; no integrated main switch - requires external 100V MOSFET; lower quiescent current (25μA vs. 270μA). | Optimized for ultra-low-power PoE devices (<5W); lacks programmable RDELAY and thermal foldback. | Choose for cost-sensitive, low-power endpoints where external FET layout is acceptable and thermal robustness is secondary. |
Compared with LT4275AIMSE#PBF and NCP1094DR2G, the MP8005DF-LF uniquely combines integrated 100V switch, programmable gate delay, and thermal foldback in a TSSOP-20 package-enabling compact, robust 13W PoE designs without external high-voltage FETs or complex timing networks.
Availability
MP8005DF-LF is available at Aetrix Electronics and suitable for VoIP telephony, security camera systems, industrial network cards, and remote internet power applications requiring stable component supply, RoHS-compliant packaging, and long-term lifecycle support.
Supply support for MP8005DF-LF includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with design centers in the US, China, and Taiwan.
The MP8005 belongs to MPS's PoE PD controller product line, engineered specifically for IEEE 802.3af-compliant powered devices requiring integrated detection, classification, inrush control, and synchronous DC-DC regulation in space-constrained applications.
FAQ
What is the maximum input voltage the MP8005DF-LF can withstand?
The MP8005DF-LF supports absolute maximum VDD of +100V, but its recommended operating range is 0–57V per IEEE 802.3af specifications. Sustained operation above 57V risks exceeding thermal limits and triggering shutdown, though the 100V rating protects against transient surges such as PSE open-circuit testing or lightning-induced spikes on Ethernet lines.
Does the MP8005DF-LF support IEEE 802.3at (PoE+)?
No, the MP8005DF-LF is designed exclusively for IEEE 802.3af (Type 1) with 13W maximum power. It lacks the higher classification current thresholds (e.g., 35–60mA for Class 4) and extended voltage tolerance required for 802.3at. For PoE+, consider MPS's MP8017 or Analog Devices' LT4275 series.
How is output voltage programmed on the MP8005DF-LF?
Output voltage is set using an external resistor divider from VOUT to AGND, connected to the VFB pin. With a 0.818V internal reference, a standard 10kΩ/20kΩ divider yields 2.45V; scaling the upper resistor achieves 3.3V (e.g., 30.1kΩ/10kΩ) or 5V (e.g., 61.9kΩ/10kΩ). Layout must minimize noise pickup on VFB trace.
What is the purpose of the RDELAY pin?
RDELAY sets the delay between SYNCGATE falling and MAINGATE rising to prevent cross-conduction in synchronous rectifier topologies. A resistor from RDELAY to AGND (e.g., 100kΩ) produces ~100ns delay, critical for isolating gate drive timing in flyback or forward converters where transformer leakage inductance causes propagation delays.
Can the MP8005DF-LF operate without the external CSS capacitor?
No - the CSS capacitor is mandatory for controlled inrush current limiting. Omitting it causes unregulated current surge into the input capacitor, leading to immediate thermal shutdown or damage to the internal 1Ω switch. Typical values range from 1nF to 10nF, selected to limit peak RTN current to ≤460mA during startup.
Is the exposed thermal pad electrically connected internally?
Yes - the exposed pad is internally connected to VSS (Pin 9), the Ethernet negative return. It must be soldered to a dedicated PCB copper pour tied to VSS and thermally coupled to internal ground planes. Failure to connect it degrades θJA from 105°C/W to >150°C/W, risking thermal shutdown under 400mA load.
What happens if the CLASS resistor is omitted?
Omitting the CLASS resistor defaults the device to Class 0 (up to 15.4W), but the MP8005DF-LF will still draw classification current (38–41.2mA) when VDD reaches 10.2–13V. Without RCLASS, the PSE may misclassify or limit power; for guaranteed 12.95W (Class 3), use 4.42kΩ per datasheet Table 1.
MP8005DF-LF Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Monolithic Power Systems Inc.
- Series:
- -
- Package/Case:
- 20-TSSOP (0.173", 4.40mm Width) Exposed Pad
- Packaging:
- Tube
- Product Status:
- Active
- Type:
- Controller (PD), DC/DC
- Number of Channels:
- 1
- Power - Max:
- -
- Internal Switch(s):
- No
- Auxiliary Sense:
- No
- Standards:
- 802.3af (PoE)
- Voltage - Supply:
- 0V ~ 57V
- Current - Supply:
- 270µA
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 20-TSSOPF-EP
MP8005DF-LF FAQ
1.How can I place an order for MP8005DF-LF through Aetrix?
Please submit a Request for Quotation (RFQ) for MP8005DF-LF on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for MP8005DF-LF reliable?
The price and inventory of MP8005DF-LF are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for MP8005DF-LF is usually 5 days.
3.What payment methods are accepted for MP8005DF-LF?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for MP8005DF-LF transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for MP8005DF-LF?
MP8005DF-LF orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your MP8005DF-LF order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for MP8005DF-LF?
For technical support, including MP8005DF-LF datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your MP8005DF-LF requirements.
6.How does Aetrix verify that MP8005DF-LF is sourced from the original manufacturer or authorized distributors?
All MP8005DF-LF products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that MP8005DF-LF meets industry standards.
7.What is the process for return or replacement of MP8005DF-LF?
All MP8005DF-LF units undergo pre-shipment inspection (PSI). If there is an issue with MP8005DF-LF, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The MP8005DF-LF part is unused and in its original packaging.
Return procedure for MP8005DF-LF:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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