Monolithic Power Systems Inc. MP8008LGV-Z

Overview

MP8008LGV-Z from Monolithic Power Systems is a fully integrated IEEE 802.3af/at-compliant powered device (PD) interface with peak-current-mode flyback controller, featuring 100V hot-swap MOSFET (0.48Ω R_ON), 85mA inrush current limit, 840mA operational current limit, and programmable 30–400kHz switching frequency. It delivers regulated 12V/1A output for PoE-powered security cameras and WLAN access points.

For engineers reviewing the MP8008LGV-Z datasheet, MP8008LGV-Z pinout, MP8008LGV-Z application, or MP8008LGV-Z equivalent, this IC enables single-chip PoE PD front-end design with detection, classification, inrush control, thermal protection, and isolated/non-isolated flyback regulation - critical for compact, high-reliability Ethernet-powered devices.

Technical Context

The MP8008LGV-Z implements dual-stage PoE handshaking: first, a 24.9kΩ DET resistor enables IEEE 802.3af/at detection (2.7–10.1V); second, CLASS pin current (programmable 2–42.6mA via external resistor) supports 1-event (Class 0–3) or 2-event (Class 4) classification. Its T2P open-drain output signals Type-2 PSE presence, while AUX pin discriminates wall adapter vs. PSE input by monitoring VDD–AUX voltage thresholds (–2.3V and –0.6V).

Internally, the flyback controller uses peak-current-mode PWM with cycle-by-cycle current limiting (185mV ISENSE threshold), pulse-skip mode for light-load efficiency, and integrated protections including OVP (1.438V FB reference), SCP (350mV), OLP, and thermal shutdown at 160°C. The COMP pin serves as error amplifier output for non-isolated designs or feedback node for optocoupler-based isolated topologies.

Key Specifications

Pinout & Package

MP8008LGV-Z is housed in a thermally enhanced QFN-28 package (4mm × 5mm, 0.5mm pitch) with exposed thermal pad. Pin 1 is marked by dot; NC pins (4,14–17,22,28) must be tied to GND in layout.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PoE PD interface with flyback controller applications.

Compared with LT4275AIMSE#PBF and TPS23754PWPR, MP8008LGV-Z uniquely integrates full 802.3af/at compliance, wall adapter detection, and 400kHz programmable flyback control in one QFN-28 package-reducing design time and PCB area while supporting both legacy and high-power PoE deployments.

Availability

MP8008LGV-Z is available at Aetrix Electronics and suitable for security cameras, WLAN access points, video telephones, and IoT edge gateways requiring stable component supply, long-term lifecycle support, and RoHS-compliant manufacturing.

Supply support for MP8008LGV-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, with core expertise in DC/DC conversion, PoE, motor drivers, and LED lighting controllers.

The MP8008L product line delivers fully integrated PoE PD solutions targeting space-constrained, high-efficiency Ethernet-powered devices - designed to replace multi-chip PD + DC/DC architectures with single-package reliability and simplified certification.

FAQ

What is the minimum detection resistance required for IEEE 802.3af/at compliance?

The MP8008LGV-Z requires a 24.9kΩ ±1% resistor between VDD and DET to present a compliant 23.7–26.3kΩ signature to the PSE. This value ensures reliable detection across the 2.7–10.1V voltage range specified in IEEE 802.3af/at, with leakage current below 5μA at 57V.

How does the MP8008LGV-Z handle dual power sources (PoE and wall adapter)?

The AUX pin monitors VDD–AUX voltage: if it exceeds –2.3V, the IC disables the hot-swap MOSFET and CLASS function, activates T2P, and routes power from the wall adapter. This automatic switchover requires no external logic and maintains uninterrupted operation during PSE failure.

Can the MP8008LGV-Z support isolated flyback topologies?

Yes - the FB pin serves as OVP monitor and feedback input for isolated designs using an optocoupler and TL431. When configured this way, the COMP pin becomes the error amplifier output referenced to primary ground, enabling precise regulation with <±1.5% output tolerance across line/load/temperature.

What protection features activate during output short-circuit conditions?

During short-circuit, the ISENSE comparator triggers at 350mV (SCP threshold), forcing immediate PWM shutdown. Concurrently, the OLP timer discharges the SS capacitor, initiating hiccup mode with 17.8μA discharge current and 50μs restart delay - preventing thermal runaway while maintaining self-recovery capability.

Is the RTN pin used for both inrush limiting and continuous current sensing?

Yes - RTN is the source node of the internal hot-swap MOSFET. During startup, V_RTN < 1.2V enforces 85mA inrush; once V_RTN rises above 1.2V, the limit increases to 840mA. If V_RTN exceeds 10V for >1ms, the controller reverts to inrush mode and pulls PG low to signal fault.

What is the maximum allowable VIN voltage for the flyback controller section?

The VIN pin accepts 7–35V input per recommended operating conditions. Exceeding 35V risks damage to the internal LDO powering VCC; the absolute maximum rating is 40V, but sustained operation above 35V voids thermal performance guarantees and may trigger OVP protection.

Does the MP8008LGV-Z support frequency synchronization with external clock sources?

Yes - applying an external clock signal (80–400kHz) to the EN/SYNC pin overrides the RT-set frequency and synchronizes switching to the external source. This feature reduces EMI in multi-rail systems and enables deterministic noise placement for EMC compliance testing.