Monolithic Power Systems Inc. MP8017GL-Z

Overview

MP8017GL-Z from Monolithic Power Systems is an IEEE 802.3af-compliant PoE powered device (PD) IC with integrated active-clamp flyback controller, 100V/0.5Ω hot-swap MOSFET, dual regulation modes (PSR and SSR), 1.5A switching current limit, and QFN-19 (3mm×4mm) package - designed for compact 13W isolated PoE applications including security cameras and VoIP phones.

For engineers reviewing the MP8017GL-Z datasheet, MP8017GL-Z pinout, MP8017GL-Z application, or MP8017GL-Z equivalent, key selection considerations include PSR/SSR topology flexibility, 500kHz configurable switching frequency, 37–57V input range, integrated OLP/OVP/OTP protection, and compatibility with MPS MPL-AT inductors.

Technical Context

The MP8017 implements a dual-mode active-clamp flyback architecture: in PSR mode, it regulates output voltage without auxiliary winding using VDIODE-compensated primary-side sensing; in SSR mode, it uses optocoupler feedback via COMP pin with internal EA disabled and FB repurposed for OVP threshold setting.

Its PD interface fully satisfies IEEE 802.3af detection (1.5V on-threshold, 24.9kΩ signature), classification (Class 0–4 support via RCLASS), inrush control (120mA limit, 100ms delay), and 100V hot-swap FET operation - all coordinated through DET, CLASS, and M/D pins with hiccup-mode fault recovery.

Key Specifications

Pinout & Package

MP8017GL-Z is housed in a thermally enhanced QFN-19 (3mm × 4mm) package with exposed thermal pad (PGND-connected), optimized for PoE PD board layouts requiring high voltage isolation and low profile.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar PoE PD controller applications.

Compared with LT4275AIMSE#PBF and TPS23753APWR, MP8017GL-Z uniquely integrates active-clamp flyback with dual PSR/SSR regulation in one QFN-19 package - reducing component count by ≥6 versus two-chip solutions and enabling 13W in <200mm² footprint.

Availability

MP8017GL-Z is available at Aetrix Electronics and suitable for security camera deployments, VoIP endpoint manufacturing, and WLAN access point production requiring stable component supply and long-term lifecycle assurance.

Supply support for MP8017GL-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with core expertise in DC/DC converters, PoE solutions, motor drivers, and battery management.

The MP8017 belongs to MPS's IEEE-compliant PoE PD controller product line, engineered specifically for space-constrained, isolated 13W endpoints where integration, efficiency, and regulatory compliance are critical.

FAQ

What is the maximum supported output power and corresponding input voltage range?

The MP8017GL-Z supports up to 13W output power with a guaranteed 37V to 57V input range - matching the post-bridge voltage window of IEEE 802.3af PSEs. Efficiency peaks above 85% at 1A/12V output with 48V input and 500kHz switching, per typical performance curves in the datasheet.

How does PSR mode eliminate the need for an auxiliary winding?

PSR mode uses internal VDIODE compensation and primary-side reflected voltage sampling at the SW pin to infer secondary output voltage - avoiding auxiliary winding parasitics and leakage inductance errors. The FB pin connects directly to SW, and VDIODE resistor adjusts for diode forward drop variation across load and temperature.

Can MP8017GL-Z operate with IEEE 802.3at (PoE+) PSEs?

Yes - the MP8017GL-Z responds to 802.3at PSEs at Class 4 level (25.5W capability), though its internal converter is rated for 13W continuous output. It meets 802.3at detection and classification requirements, allowing interoperability while limiting delivered power to its safe operating area.

What thermal management provisions exist in the QFN-19 package?

The QFN-19 (3mm×4mm) package features an exposed thermal pad tied to PGND, with θ_JA = 50°C/W on a 2-layer 42mm×60mm EVB. Layout guidelines require ≥4 thermal vias under the pad connected to inner PGND planes; junction temperature is monitored via internal sensor with 150°C shutdown and 20°C hysteresis.

How is overload protection implemented and recovered?

Overload triggers hiccup mode: SS pin discharges to 0.2V, halting switching for ~100ms (t_SD-COOL), then re-attempts soft-start. This cycle repeats until fault clears. Unlike latch-off, hiccup enables autonomous recovery - critical for remote PoE devices where manual reset is impractical.

Is external compensation required for stable PSR or SSR loop operation?

No external compensation is needed for basic PSR operation - internal EA and slope compensation are factory-trimmed. For SSR mode, the optocoupler CTR and COMP pull-up resistor (9–11kΩ) set dominant pole; MPS recommends RC network on COMP only if phase margin falls below 45° in high-bandwidth designs.

What is the role of the M/D pin beyond dither enable?

The M/D pin selects between PSR/SSR regulation mode (voltage level 1/2) and enables frequency dithering (level 3). Its 4-level logic (0.1V/0.7V/1.5V/2.15V thresholds) is read during startup - making it a configuration pin that must be pulled to defined voltage before VDD exceeds UVLO, not a runtime control.