Monolithic Power Systems Inc. MPQ18021HS-A-LF-Z

Overview

MPQ18021HS-A-LF-Z from Monolithic Power Systems is a high-frequency, 100V-rated, half-bridge N-channel MOSFET gate driver in SOIC8 package, delivering 2.5A peak sink/source current per channel, <5ns high-side/low-side propagation matching, and integrated bootstrap diode. It drives telecom half-bridge power supplies and avionics DC-DC converters with 12ns/9ns rise/fall times into 1nF load at 12V VDD.

For engineers reviewing the MPQ18021HS-A-LF-Z datasheet, MPQ18021HS-A-LF-Z pinout, MPQ18021HS-A-LF-Z application, or MPQ18021HS-A-LF-Z equivalent, key selection criteria include bootstrap voltage range (115V), UVLO thresholds (7.4V/6.5V), propagation delay (16ns typ), TTL-compatible inputs, and SOIC8 thermal performance (θJA = 90°C/W).

Technical Context

The MPQ18021HS-A-LF-Z implements independent high-side and low-side drivers with level-shifted floating architecture, enabling operation up to 100V SW node voltage and 115V BST-to-SW differential. Its internal bootstrap diode eliminates external diode requirement while supporting >50V/ns SW slew rate.

UVLO protection is implemented separately on VDD (7.4–8.9V threshold) and BST–SW (6.5–7.7V), forcing both outputs low during undervoltage. Input logic accepts TTL-level signals with 185kΩ internal pull-down, and dead-time management relies on external PWM controller coordination between INH and INL.

Key Specifications

Pinout & Package

MPQ18021HS-A-LF-Z is housed in a standard SOIC8 package (5.0mm × 6.2mm, 1.27mm pitch) with exposed pad not present; thermal resistance θJA = 90°C/W on 4-layer PCB per JESD51-7.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar half-bridge gate driver applications.

Compared with MPQ18021HS-A-LF-Z, the MPQ18021GS-A-LF-Z offers superior thermal dissipation in compact layouts, while the IRS21844STRPBF trades integration for broader vendor support but increases layout sensitivity and timing uncertainty.

Availability

MPQ18021HS-A-LF-Z is available at Aetrix Electronics and suitable for telecom half-bridge power supplies, avionics DC-DC converters, and two-switch forward converters requiring stable component supply, RoHS-compliant packaging, and automotive-grade qualification (AEC-Q100 not claimed, but qualified per MPQ series industrial temp grade).

Supply support for MPQ18021HS-A-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance analog and power ICs, headquartered in Kirkland, WA, with global design and support centers.

The MPQ18021 series belongs to MPS's high-voltage gate driver product line, engineered specifically for isolated DC-DC conversion in telecom, aerospace, and industrial systems demanding robust 100V operation, tight timing control, and minimal external components.

FAQ

What is the maximum allowable BST-to-SW voltage for MPQ18021HS-A-LF-Z?

The absolute maximum BST-to-SW voltage is +115V, with recommended operating limit at +100V per datasheet Section "Absolute Maximum Ratings." Exceeding 115V risks permanent damage to the internal bootstrap diode and level-shift circuitry, even momentarily.

Can MPQ18021HS-A-LF-Z drive both MOSFETs simultaneously in a two-switch forward topology?

Yes - the INH and INL inputs operate independently, allowing simultaneous activation of DRVH and DRVL. This configuration is explicitly supported in the datasheet's Two-Switch Forward Converter reference design (Figure 5), where both MOSFETs switch in phase to transfer energy through the transformer.

Does MPQ18021HS-A-LF-Z require an external bootstrap diode?

No - it integrates a low-forward-voltage bootstrap diode (VF = 0.5V @ 100µA) with dynamic resistance of 2.5Ω @ 100mA. External diodes are unnecessary unless operating beyond 115V BST–SW or requiring ultra-low leakage (<0.05µA) not guaranteed by the internal device.

What is the minimum input pulse width that reliably toggles the outputs?

The minimum guaranteed input pulse width is 50ns, as specified in the Electrical Characteristics table under "Minimum input pulse width that changes the output (TPW)." Pulses shorter than this may not register due to internal digital filtering and propagation latency.

How does UVLO behave when only the BST supply drops below threshold?

When BST–SW falls below 6.5V (typ), the high-side driver (DRVH) is forced low while the low-side driver (DRVL) remains functional if VDD is valid. This asymmetric shutdown prevents high-side shoot-through while preserving low-side control for safe discharge or fault recovery sequences.

Is MPQ18021HS-A-LF-Z pin-compatible with earlier MP18021A versions?

Yes - MPQ18021HS-A-LF-Z maintains identical SOIC8 pinout, electrical behavior, and timing specs as the MP18021A. The "Q" prefix denotes automotive-grade qualification (AEC-Q100 stress-tested), while "LF-Z" indicates lead-free, tape-and-reel packaging; functionally interchangeable in industrial designs.

What layout guidance applies to the BST and SW pins?

Place a 0.1µF X7R ceramic capacitor directly between BST and SW pins with minimal trace length (<2mm) and no vias. Avoid routing sensitive analog traces near these nodes; use solid ground plane beneath SW to suppress ringing from 50V/ns slew rates observed in high-frequency operation.