Monolithic Power Systems Inc. MPQ18024HN-AEC1-LF-Z

Overview

MPQ18024HN-AEC1-LF-Z from Monolithic Power Systems is a high-frequency, AEC-Q100 Grade 1 qualified, 100V half-bridge N-channel MOSFET gate driver in SOIC-8E package. It delivers matched high-side and low-side drive with <5ns propagation delay skew, 20ns typical propagation delay, integrated bootstrap diode, and independent TTL-compatible INH/INL inputs for automotive DC/DC and motor control applications.

For engineers reviewing the MPQ18024HN-AEC1-LF-Z datasheet, MPQ18024HN-AEC1-LF-Z pinout, MPQ18024HN-AEC1-LF-Z application, or MPQ18024HN-AEC1-LF-Z equivalent, key selection criteria include VBST = 100V rating, dual UVLO (VDD & BST-SW), 4A peak low-side pull-down current at 16V, and thermal shutdown at 170°C - all validated for automotive junction temperature range (-40°C to +125°C).

Technical Context

The MPQ18024 implements a level-shifted floating driver architecture with independent high-side and low-side control paths, enabling precise dead-time management between INH and INL inputs to prevent shoot-through in half-bridge topologies. Its internal bootstrap diode eliminates external diode requirement while supporting up to 100V BST-SW differential voltage.

Under-voltage lockout operates separately on VDD (8.5V threshold) and BST-SW (7.4V threshold), forcing both DRVH and DRVL low during undervoltage conditions. Propagation delay matching (<5ns) and fast switching (15ns rise / 12ns fall into 2.2nF at 12V) support >1MHz operation in high-efficiency automotive power converters.

Key Specifications

Pinout & Package

MPQ18024HN-AEC1-LF-Z uses a thermally enhanced SOIC-8EP (exposed pad) package with 1.27mm pitch, JEDEC MS-012 BA compliant footprint, and 50°C/W θ_JA. The exposed pad must be soldered to VSS for thermal performance and EMI reduction.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar half-bridge gate driver applications.

Compared with LM5109BMAX/NOPB and UCC27211DRCR, MPQ18024HN-AEC1-LF-Z uniquely combines AEC-Q100 Grade 1 qualification, integrated bootstrap diode, dual UVLO, and <5ns drive matching - making it optimal for safety-critical automotive half-bridge systems requiring minimal external components and guaranteed timing integrity.

Availability

MPQ18024HN-AEC1-LF-Z is available at Aetrix Electronics and suitable for automotive DC/DC converters, EPS motor drivers, and on-board charger auxiliary supplies requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for MPQ18024HN-AEC1-LF-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with design focus on efficiency, integration, and automotive-grade reliability.

The MPQ18024 belongs to MPS's AEC-Q100-qualified gate driver product line, engineered specifically for high-voltage, high-frequency automotive power conversion where timing precision, thermal resilience, and functional safety are critical.

FAQ

What is the maximum allowable V_SW voltage for MPQ18024HN-AEC1-LF-Z?

The absolute maximum V_SW rating is –5.0V to +110V, with recommended operating range of (–10V / <100ns) to (100V – V_DD). This allows safe operation during automotive load-dump transients and reverse-battery protection scenarios when paired with appropriate external clamping.

Does MPQ18024HN-AEC1-LF-Z require an external bootstrap diode?

No. The device integrates a bootstrap diode with forward voltage of 0.95V at 100mA and dynamic resistance of 2.3Ω. This eliminates the need for an external diode, reducing PCB area and improving reliability in space-constrained automotive modules.

How is dead time controlled when using MPQ18024HN-AEC1-LF-Z?

Dead time is implemented externally via the timing relationship between INH and INL signals. The device itself does not generate dead time; instead, its matched propagation delay (<5ns skew) ensures that externally generated dead time is preserved at the gate outputs, preventing shoot-through in the power stage.

What thermal derating applies above 25°C ambient?

With θ_JA = 50°C/W on a 4-layer PCB per JESD51-7, continuous power dissipation decreases linearly: at 85°C ambient, max PD = (150°C – 85°C) / 50°C/W = 1.3W. The internal thermal shutdown at 170°C provides fail-safe protection beyond this limit.

Can MPQ18024HN-AEC1-LF-Z drive SiC MOSFETs?

Yes. Its 20ns propagation delay, 15ns rise time into 2.2nF, and 4A–6A peak output current support fast-switching SiC devices. However, gate resistor selection must account for higher dV/dt immunity requirements and ensure gate voltage remains within SiC V_GS limits during switching.

Is the exposed pad electrically connected internally?

Yes. The exposed pad is internally connected to VSS and must be soldered to a VSS copper pour for thermal conduction and EMI suppression. Thermal resistance drops from 50°C/W (θ_JA) to 12°C/W (θ_JC) when properly connected.

What is the minimum input pulse width supported?

The minimum input pulse width that reliably changes the output is 50ns, guaranteed by design. This enables stable operation at PWM frequencies up to 10MHz in burst-mode or digital control schemes where narrow pulses are used for fine-grained duty-cycle adjustment.