Monolithic Power Systems Inc. MPQ1922GV-AEC1-Z

Overview

MPQ1922GV-AEC1-Z from Monolithic Power Systems is a 100V, single-channel half-bridge pre-driver IC for automotive motor control, featuring 3A source/4A sink gate drive, integrated current-sense amplifier, AEC-Q100 Grade 1 qualification, and thermally enhanced QFN-22 (4mm×5mm) package with wettable flanks.

For engineers reviewing the MPQ1922GV-AEC1-Z datasheet, MPQ1922GV-AEC1-Z pinout, MPQ1922GV-AEC1-Z application in BLDC/PMSM drives, or MPQ1922GV-AEC1-Z equivalent for high-voltage gate driving, this page delivers verified functional architecture, slew-rate programmability, desaturation protection thresholds, thermal shutdown behavior, and fault reporting logic - all confirmed from MPS Rev. 1.0 datasheet and official package documentation.

Technical Context

The MPQ1922 implements a dual-N-channel half-bridge pre-driver architecture with independent high-side (GH) and low-side (GL) gate outputs, driven by internal logic that enforces positive dead time and supports adaptive shoot-through prevention when slew rate is configured via RSR. Its bootstrap (BST) capacitor charging path is augmented by an auto-refreshable internal charge pump, enabling indefinite 100% duty-cycle operation under stable thermal conditions.

It integrates a four-gain-range current-sense amplifier (gain = 21–210 V/V, set by CSG-to-GND resistor), desaturation detection on both FETs (VDSTHL = 1.9V, VDSTHH = VG − 1.2V), and open-drain nFAULT reporting with latch-off behavior upon thermal or desaturation fault - all operating across −40°C to +165°C junction temperature range.

Key Specifications

Pinout & Package

MPQ1922GV-AEC1-Z is housed in a thermally optimized QFN-22 (4mm × 5mm) package with exposed thermal pad (EP) and wettable flank terminals for automated optical inspection (AOI) and solder joint reliability in automotive production.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar half-bridge pre-driver applications.

Compared with MPQ1922GV-AEC1-Z, the GVE variant adds manufacturability assurance without altering performance, while the non-AEC MPQ1922GV-Z omits automotive qualification - making it unsuitable for safety-critical vehicle systems despite identical gate drive capability.

Availability

MPQ1922GV-AEC1-Z is available at Aetrix Electronics and suitable for automotive BLDC motor drives, EPS assist modules, HVAC blowers, and active suspension actuators requiring stable component supply, AEC-Q100 traceability, and long-term production continuity.

Supply support for MPQ1922GV-AEC1-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with design centers in the US, China, and Taiwan, and global distribution through authorized partners.

The MPQ1922 belongs to MPS's automotive-grade gate driver product line, engineered specifically for robust, high-voltage motor control in demanding environments - emphasizing integrated protection, thermal resilience, and AEC-Q100 compliance from silicon to package.

FAQ

What is the minimum BST capacitor value required for reliable MPQ1922GV-AEC1-Z operation?

The minimum BST capacitance is calculated as CBOOT ≥ QG / (VG − VTH), where QG is the total gate charge of the external HS-FET. For typical 100V MOSFETs with QG ≈ 50nC and VG = 12V, CBOOT ≥ 100nF is recommended. Use X5R/X7R ceramic capacitors rated ≥25V; values between 100nF and 1µF ensure stable bootstrap voltage under 100% duty cycle and high-temperature operation.

How does the MPQ1922GV-AEC1-Z implement adaptive dead time, and when is it active?

Adaptive dead time activates only when slew rate is configured via RSR = 10kΩ, 30kΩ, or 100kΩ - not at RSR = 0Ω. The IC monitors GH and GL voltages in real time and delays the next FET turn-on until the previous gate voltage fully discharges below threshold, eliminating fixed-timing uncertainty. This ensures shoot-through prevention across process, voltage, and temperature variations without external timing components.

Can the current-sense amplifier measure bidirectional motor current, and how is zero-current offset set?

Yes - the current-sense amplifier supports bidirectional measurement by biasing the CSO output toward a user-defined zero-current reference via the CSR pin. Connecting CSR to a stable 2V reference (e.g., from a precision divider off VG) sets CSO = 2V at zero current; positive/negative shunt voltage produces proportional CSO deviation. Input offset is ±2.8mV max, enabling sub-100mA resolution with 5mΩ shunts.

What happens to nFAULT after a thermal shutdown event, and how is it cleared?

Upon thermal shutdown at TJ = 190°C, nFAULT latches low and remains asserted until the fault condition is removed - either by pulling nSLEEP low (to enter sleep mode), removing VG supply, or driving ENBL low. Simply cooling the die does not reset nFAULT; the device must be electrically reset to restore gate drive functionality and release nFAULT high via its external pull-up resistor.

Is the MPQ1922GV-AEC1-Z compatible with 3.3V logic microcontrollers, and what are the input thresholds?

Yes - all logic inputs (INH, INL, CSEN, nSLEEP, ENBL) accept 3.3V CMOS levels. The guaranteed high threshold VIH is 2.2V, and low threshold VIL is 0.8V, providing 1.1V noise margin at 3.3V supply. Input leakage is ±20µA, and internal 350kΩ pull-downs ensure defined states during MCU reset or I/O float, eliminating need for external biasing resistors.

Does the MPQ1922GV-AEC1-Z support 100% duty cycle operation, and what mechanism sustains the high-side gate drive?

Yes - sustained 100% duty cycle is enabled by the internal charge pump and auto-refresh circuitry. When BST voltage falls below VG × 0.65, the AR pin state (sampled at startup) determines action: if grounded, the IC automatically triggers a refresh cycle (briefly turning off HS-FET and turning on LS-FET) to recharge CBST. This maintains gate drive above threshold indefinitely, even at elevated temperatures and long on-times.

What is the maximum allowable gate resistance when using external series resistors with MPQ1922GV-AEC1-Z?

External gate resistors are discouraged when using adaptive dead time (RSR ≥ 10kΩ), as they interfere with gate voltage monitoring. If used, keep series resistance ≤5Ω and add a Schottky diode (anode to gate, cathode to GL/GH) to bypass discharge current during opposite-FET conduction. At RSR = 0Ω (full drive), external resistors up to 10Ω may be tolerated but degrade slew control and increase switching losses.