Monolithic Power Systems Inc. MPQ6528GVE-AEC1-Z

Overview

MPQ6528GVE-AEC1-Z from Monolithic Power Systems is an AEC-Q100 Grade 1 qualified H-bridge gate driver IC designed to control two independent half-bridges of external N-channel MOSFETs across a 5V–60V input range. It integrates a regulated charge pump (VREG = 9.5–13V), bootstrap high-side drivers with trickle-charge for 100% duty cycle, configurable dead time (700ns–5.7µs), and dual over-current protection (OCP/SCP) - enabling robust motor control in automotive actuators and brushed DC motor systems.

For engineers reviewing the MPQ6528GVE-AEC1-Z datasheet, MPQ6528GVE-AEC1-Z pinout, MPQ6528GVE-AEC1-Z application, or MPQ6528GVE-AEC1-Z equivalent, key selection criteria include VIN operating range, BST/HS-FET gate drive capability, OCP threshold adjustability via OC_REF, thermal shutdown at 190°C, and QFN-28 wettable flank package compatibility with automotive reflow and automated optical inspection.

Technical Context

The MPQ6528 employs a dual-phase architecture with independent ENA/ENB enable logic and PWM inputs (PWMA/PWMB), supporting bidirectional H-bridge operation. Its charge pump generates VREG from VIN ≥5V, while bootstrap circuits (BSTA/BSTB) with internal trickle-charge sustain high-side gate voltage during continuous conduction - eliminating external boost supplies.

Protection is implemented via three parallel mechanisms: UVLO (3.2–5V rising threshold), LSS-based OCP (0.4–0.6V threshold), and VDS-sensing SCP triggered by OC_REF voltage comparison. Fault status is reported through open-drain nFAULT, and thermal shutdown (190°C) includes 30°C hysteresis for stable recovery.

Key Specifications

Pinout & Package

MPQ6528GVE-AEC1-Z is housed in a thermally enhanced QFN-28 (4mm × 5mm) package with wettable flanks and an exposed GND-connected thermal pad on the underside. Pin numbering follows standard top-view orientation with Pin 1 at top-left corner.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar H-bridge gate driver applications.

Compared with TB9051FTG and BTS71620, MPQ6528GVE-AEC1-Z uniquely combines 60V operation, 100% duty cycle BST sustain, and AEC-Q100 Grade 1 qualification in a discrete-FET interface - making it optimal for high-reliability, high-voltage automotive motion control where external MOSFET selection and thermal management are design priorities.

Availability

MPQ6528GVE-AEC1-Z is available at Aetrix Electronics and suitable for automotive door lock actuators, brushed DC motor controllers, industrial gate openers, and Class-D audio amplifier half-bridge drivers requiring stable component supply, AEC-Q100 compliance, and extended temperature operation.

Supply support for MPQ6528GVE-AEC1-Z includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Monolithic Power Systems (MPS) is a fabless semiconductor company specializing in high-performance power management ICs, with core expertise in DC/DC converters, gate drivers, and motor control solutions.

The MPQ6528 belongs to MPS's automotive-grade gate driver product line, engineered specifically for AEC-Q100-compliant brushed DC motor and actuator control in harsh environments - emphasizing robust protection, thermal resilience, and manufacturability in automotive production.

FAQ

What is the minimum recommended BST capacitor value for MPQ6528GVE-AEC1-Z?

A 0.1µF X7R/X5R ceramic capacitor rated for ≥25V is the minimum recommended BST capacitor (CBST) for most applications. The datasheet specifies CBST > 8 × QG (total gate charge) for proper turn-on energy; values up to 1µF are acceptable, but exceeding 1µF may delay startup. Placement must be adjacent to BSTA/SHB pins with short traces to minimize loop inductance.

How does the MPQ6528 handle shoot-through prevention beyond dead time adjustment?

In addition to adjustable external dead time via the DT pin, the MPQ6528 implements internal logic that enforces non-overlapping gate drive signals - even during rapid PWM transitions or fault recovery. This hardware-level interlock complements the programmable dead time and prevents simultaneous HS/LS conduction regardless of input timing skew or noise glitches on PWMA/PWMB lines.

Can the OCP and SCP protections be disabled independently?

Yes. OCP (LSS-based) is disabled by connecting the LSS pin directly to GND. SCP (VDS-based) is disabled by connecting a 100kΩ resistor between VREG and OC_REF pins. Both protections remain active by default; disabling either requires explicit external component placement and forfeits that layer of fault coverage - not recommended in safety-critical automotive applications.

What is the purpose of the exposed thermal pad on the QFN-28 package?

The exposed thermal pad on the bottom of the QFN-28 package is electrically and thermally connected to GND. It must be soldered to a large PCB copper pour (≥250mm²) with ≥4 thermal vias to achieve the specified θJA = 40°C/W. This pad reduces junction-to-ambient thermal resistance by ~30%, enabling sustained 3.1W power dissipation at 25°C ambient and preventing premature thermal shutdown under load.

Does MPQ6528GVE-AEC1-Z support 3.3V logic inputs from microcontrollers?

Yes. The MPQ6528GVE-AEC1-Z accepts 3.3V logic levels: its input high threshold (VIN_HIGH) is 2.0V min, and input low threshold (VIN_LOW) is 0.8V max. All logic pins (PWMA, PWMB, ENA, ENB, nSLEEP, nFAULT) tolerate 3.3V CMOS signaling directly - no level-shifting required when interfacing with common automotive MCUs such as NXP S32K or Infineon AURIX.

How does the trickle-charge circuit maintain BST voltage at 100% duty cycle?

The trickle-charge circuit injects ~5µA of current into the BST capacitor during high-side conduction to offset leakage losses. This small, continuous charge replenishes the capacitor's discharge caused by gate driver quiescent current and parasitic paths - sustaining sufficient gate-source voltage (VGS) to keep the HS-FET fully enhanced even when the LS-FET remains off indefinitely.

Is the MPQ6528GVE-AEC1-Z pin-compatible with earlier MPQ6528 variants?

Yes. MPQ6528GVE-AEC1-Z shares identical pinout, footprint, and electrical characteristics with non-AEC-Q100 MPQ6528GVE variants. The "-AEC1" suffix denotes automotive qualification (Grade 1), while "-Z" indicates tape-and-reel packaging - both are mechanically and functionally interchangeable in existing designs requiring enhanced reliability validation.