onsemi NP2100SBT3G
- Part No.:
- NP2100SBT3G
- Manufacturer:
- onsemi
- Category:
- Thyristors
- Package:
- DO-214AA, SMB
- Datasheet:
-
NP2100SBT3G.pdf
- Description:
- THYRISTOR 180V 80A DO-214AA
- Quantity:
- Payment:

- Shipping:

Inventory:6,667
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
NP2100SBT3G from onsemi is a bidirectional thyristor surge protector (TSPD) designed for overvoltage clamping in telecom line interfaces. It features 180 V peak off-state voltage (VDRM), 240 V breakover voltage (VBO), 4.0 V on-state voltage at 1.0 A, 150 mA holding current, and supports 10×1000 µs surge currents up to 50 A(pk) per GR-1089-CORE. It is used in central office and customer premises equipment to meet IEC 61000-4-5 and ITU-T K.20/21 compliance.
For engineers reviewing the NP2100SBT3G datasheet, pinout, applications, or equivalent options, key selection criteria include bidirectional crowbar action, SMB package thermal resistance (90 °C/W), 37 pF capacitance at 1 MHz, 5 kV/µs critical dv/dt rating, and RoHS-compliant lead-free construction.
Technical Context
The NP2100SBT3G operates as a voltage-triggered bilateral crowbar device: it remains high-impedance below VDRM (180 V), switches to low-impedance conduction above VBO (240 V) in either polarity, and latches until current falls below IH (150 mA). Its 5 kV/µs dv/dt immunity prevents false triggering during fast transients.
It delivers defined surge handling per standardized waveforms - 50 A(pk) for 10×1000 µs (GR-1089-CORE), 75 A(pk) for 10×360 µs, and 150 A(pk) for 2×10 µs - with thermal resistance of 90 °C/W enabling reliable operation in FR4 PCB layouts without heatsinking under repetitive surge conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VDRM | 180 V - Maximum continuous off-state voltage before conduction in either polarity |
| VBO | 240 V - Voltage threshold at which bidirectional breakover and crowbar action initiate |
| VT | 4.0 V - Clamped on-state voltage during surge diversion at 1.0 A peak current |
| IH | 150 mA - Minimum current required to maintain conduction after triggering |
| CO | 37 pF - Signal-line capacitance at 1 MHz, minimizing impact on high-speed telecom data integrity |
| dv/dt | 5.0 kV/µs - Critical rate of rise of off-state voltage that must not be exceeded to avoid spurious turn-on |
| TJ Range | −40 °C to +150 °C - Operating junction temperature range suitable for uncontrolled telecom cabinet environments |
Pinout & Package
NP2100SBT3G uses the SMB (DO-214AA, Case 403C) surface-mount package - a 2-pin, bidirectional device with no polarity marking. The package measures 4.06 mm × 3.30 mm × 2.11 mm (L × W × H) and features gull-wing leads compatible with standard reflow profiles.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| MT1 | Main Terminal 1 | Bidirectional anode/cathode - interchangeable with MT2; connects to protected line or ground return path |
| MT2 | Main Terminal 2 | Bidirectional anode/cathode - interchangeable with MT1; completes crowbar current path during overvoltage events |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional crowbar protection | Single-device replacement for back-to-back SCRs or diacs, reducing board area and BOM count in telecom line cards |
| GR-1089-CORE & IEC 61000-4-5 compliance | Validated surge performance across 2×10 µs to 10×1000 µs waveforms enables direct use in carrier-grade infrastructure |
| Low 37 pF capacitance | Preserves signal integrity on T1/E1, xDSL, and POTS lines without degrading high-frequency response or causing echo |
| Pb-free SMB package | RoHS-compliant construction with JEDEC DO-214AA footprint ensures compatibility with automated SMT assembly and IPC-A-610 Class 3 requirements |
| 150 °C max junction temperature | Enables deployment in sealed, fanless telecom enclosures where ambient temperatures exceed 85 °C |
Applications
| Central Office Line Card Protection | DSLAM Port Surge Suppression |
|---|---|
|
Use Scenario: Protecting analog voice and digital data ports in carrier-class central office switching systems against lightning-induced surges and AC power cross faults. IC Role / Device Role / Timing Role: Bidirectional crowbar device that clamps line-to-ground transients exceeding 240 V while diverting up to 50 A(pk) per 10×1000 µs waveform. Use Value: Enables compliance with GR-1089-CORE Level 3 (50 A) and eliminates need for discrete back-to-back thyristor pairs. |
Use Scenario: Safeguarding xDSL line drivers and receivers in DSL access multiplexers exposed to induced surges on outside plant copper loops. IC Role / Device Role / Timing Role: Fast-acting voltage-triggered protector placed between line transformer secondary and PHY IC, responding within nanoseconds of overvoltage onset. Use Value: 37 pF capacitance avoids signal distortion on ADSL2+ and VDSL2 channels up to 30 MHz while maintaining >5 kV/µs dv/dt immunity. |
| Customer Premises Equipment (CPE) | ISDN BRI Interface Protection |
|
Use Scenario: Integrated surge protection in residential gateways, VoIP adapters, and fiber NTUs where space-constrained PCBs require minimal component count. IC Role / Device Role / Timing Role: Single-component solution replacing dual-diode or MOV+TVS combinations on POTS and broadband line inputs. Use Value: SMB footprint reduces layout area by >40% versus discrete alternatives while supporting full IEC 61000-4-5 Level 3 (1 kV/0.5 Ω) testing. |
Use Scenario: Protecting balanced 2B+D ISDN basic rate interfaces operating at 144 kbps against longitudinal surges and tip/ring reversals. IC Role / Device Role / Timing Role: Symmetrical bidirectional protector connected across tip and ring, providing identical clamping in both polarities without polarity-sensitive placement. Use Value: Eliminates risk of misorientation during assembly and ensures matched response time (<100 ns) on both B-channels and D-channel signaling lines. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar thyristor surge protector applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| NP2100SAT3G | Same electrical specs (VDRM, VBO, IH) but marked "064A" instead of "210B"; identical SMB package and surge ratings | No functional difference - differs only in date code and internal lot traceability; both meet GR-1089-CORE and IEC 61000-4-5 | Select NP2100SAT3G when sourcing from alternate manufacturing lots or requiring different date-code formatting |
| NP2100SCT3G | Identical parametric performance and SMB packaging; differentiated solely by "210C" marking and internal wafer lot | Functionally interchangeable in all telecom surge protection roles; same thermal resistance (90 °C/W) and capacitance (37 pF) | Choose NP2100SCT3G for supply chain diversification across onsemi's three parallel production streams (A/B/C variants) |
Compared with NP2100SAT3G and NP2100SCT3G, the NP2100SBT3G offers identical surge clamping behavior, thermal performance, and signal-line capacitance - differing only in manufacturer-marked lot identification ("210B") - making all three fully substitutable in design-in and production without layout or validation changes.
Availability
NP2100SBT3G is available at Aetrix Electronics and suitable for central office line cards, DSLAM port protection, and customer premises equipment requiring stable component supply, long-term lifecycle support, and RoHS-compliant surge suppression.
Supply support for NP2100SBT3G includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
onsemi (formerly ON Semiconductor) is a global semiconductor supplier specializing in energy-efficient power, analog, sensor, and connectivity solutions for automotive, industrial, cloud, and communication markets.
The NP Series TSPDs were developed specifically for telecom infrastructure protection - delivering standardized, high-reliability crowbar action in compact SMB packages to replace legacy discrete SCR-based protectors in GR-1089-CORE-certified systems.
FAQ
What is the maximum surge current rating for NP2100SBT3G under GR-1089-CORE 10×1000 µs waveform?
The NP2100SBT3G is rated for 50 A(pk) under the GR-1089-CORE 10×1000 µs double-exponential decay waveform. This value is specified in the "SURGE RATINGS" table on page 3 of the official datasheet (Rev. 5, May 2008), and reflects non-repetitive short-circuit current capability with proper PCB thermal management. The NP2100SBT3G maintains this rating without degradation when mounted on a 3″×4.5″ FR4 board with 2 oz copper.
Does NP2100SBT3G require external gate control or biasing circuitry?
No, the NP2100SBT3G is a passive, voltage-triggered thyristor device with no gate terminal. It operates autonomously: conduction initiates when voltage across MT1–MT2 exceeds VBO (240 V) in either polarity, and latches until current drops below IH (150 mA). No external bias, timing components, or control signals are needed - the NP2100SBT3G functions as a self-contained crowbar.
Can NP2100SBT3G be used in DC power line protection applications?
The NP2100SBT3G is not recommended for standalone DC power rail protection. Its 150 mA holding current requires the protected circuit to interrupt current flow after clamping - a condition naturally met in AC-coupled telecom lines but not in constant-current DC supplies. For DC power rails, dedicated resettable fuses or active OVP ICs are preferred. The NP2100SBT3G is engineered for AC/telecom signal-line protection where current naturally crosses zero.
What is the thermal resistance (RθJA) of NP2100SBT3G, and how does it affect layout?
The NP2100SBT3G has a junction-to-ambient thermal resistance of 90 °C/W when mounted on a 3″×4.5″ FR4 PCB with 2 oz copper in a 3×3 inch pattern per EIA/JESD51-3. This value means each watt of surge dissipation raises junction temperature by 90 °C above ambient. To ensure reliability, designers must limit average power dissipation and avoid placing heat-sensitive components within 5 mm of the NP2100SBT3G's SMB body.
How does the 37 pF capacitance of NP2100SBT3G impact high-speed data lines like VDSL2?
The 37 pF capacitance of NP2100SBT3G - measured at 1 MHz with 2 Vdc bias - introduces negligible insertion loss below 30 MHz, making it suitable for VDSL2 (up to 30 MHz) and G.fast (up to 212 MHz) when placed after line transformers. Unlike higher-capacitance MOVs or TVS diodes, this low value avoids signal attenuation, phase distortion, and echo on symmetric DSL pairs - a key reason the NP2100SBT3G is specified in carrier-grade DSLAM reference designs.
NP2100SBT3G Specifications
- Product attributes
- Attribute value
- Manufacturer:
- onsemi
- Package/Case:
- DO-214AA, SMB
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Voltage - Breakover:
- 240V
- Voltage - Off State:
- 180V
- Voltage - On State:
- 4 V
- Current - Peak Pulse (8/20µs):
- -
- Current - Peak Pulse (10/1000µs):
- 80 A
- Current - Hold (Ih):
- 150 mA
- Number of Elements:
- 1
- Capacitance:
- 59pF
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SMB
NP2100SBT3G FAQ
1.How can I place an order for NP2100SBT3G through Aetrix?
Please submit a Request for Quotation (RFQ) for NP2100SBT3G on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for NP2100SBT3G reliable?
The price and inventory of NP2100SBT3G are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for NP2100SBT3G is usually 5 days.
3.What payment methods are accepted for NP2100SBT3G?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for NP2100SBT3G transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for NP2100SBT3G?
NP2100SBT3G orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your NP2100SBT3G order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for NP2100SBT3G?
For technical support, including NP2100SBT3G datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your NP2100SBT3G requirements.
6.How does Aetrix verify that NP2100SBT3G is sourced from the original manufacturer or authorized distributors?
All NP2100SBT3G products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that NP2100SBT3G meets industry standards.
7.What is the process for return or replacement of NP2100SBT3G?
All NP2100SBT3G units undergo pre-shipment inspection (PSI). If there is an issue with NP2100SBT3G, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The NP2100SBT3G part is unused and in its original packaging.
Return procedure for NP2100SBT3G:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
NP2100SBT3G Tags

-
TISP4015L1AJR-S
Bourns Inc.

-
TISP4015L1BJR-S
Bourns Inc.

-
SMP100LC-270
STMicroelectronics

-
TISP4240M3BJR-S
Bourns Inc.

-
SMP100LC-35
STMicroelectronics

-
SMP100LC-65
STMicroelectronics

-
SMP100LC-8
STMicroelectronics

-
TISP4P035L1NR-S
Bourns Inc.

-
TISP4350H3BJR-S
Bourns Inc.

-
TISP4011H1BJR-S
Bourns Inc.

-
SMP100LC-400
STMicroelectronics

-
P0300SALRP
Littelfuse Inc.
Tech Hub
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…

