Vishay General Semiconductor - Diodes Division P4SMA56AHE3_A/H
- Part No.:
- P4SMA56AHE3_A/H
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Category:
- TVS Diodes
- Package:
- DO-214AC, SMA
- Datasheet:
-
P4SMA56AHE3_A/H.pdf
- Description:
- TVS DIODE 47.8VWM 77VC DO214AC
- Quantity:
- Payment:

- Shipping:

Inventory:7,200
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
P4SMA56AHE3_A/H from Vishay General Semiconductor is a unidirectional surface-mount Transient Voltage Suppressor (TVS) diode in SMA (DO-214AC) package, designed for clamping voltage transients on power and signal lines. It features a 56 V breakdown voltage (VBR = 53.2–58.8 V at IT = 1.0 mA), 47.8 V stand-off voltage (VWM), 77.0 V maximum clamping voltage (VC) at 5.2 A peak pulse current (IPPM), and 400 W peak pulse power rating with 10/1000 µs waveform - used to protect MOSFETs, ICs, and sensor signal lines in automotive and industrial power supplies.
For engineers reviewing the P4SMA56AHE3_A/H datasheet, P4SMA56AHE3_A/H pinout, P4SMA56AHE3_A/H application, or P4SMA56AHE3_A/H equivalent, this AEC-Q101 qualified TVS offers verified transient suppression performance, RoHS-compliant matte tin terminations, MSL Level 1 moisture sensitivity, and validated thermal resistance (RθJA = 120 °C/W) for high-reliability PCB-level surge protection design.
Technical Context
The P4SMA56AHE3_A/H operates as a unidirectional avalanche diode, conducting only when reverse voltage exceeds its breakdown threshold to divert transient energy to ground. Its glass-passivated junction ensures stable VBR tolerance (±5%) and low incremental surge resistance, enabling fast response (<1 ns) to ESD and inductive switching events.
Rated for continuous operation from –65 °C to +150 °C, it delivers 3.3 W steady-state power dissipation on infinite heatsink at 50 °C ambient and supports 40 A non-repetitive forward surge current (IFSM, 8.3 ms half-sine). The device meets UL 497B recognition (QVGQ2) and is qualified per AEC-Q101 for automotive under-hood applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VBR (min/max) | 53.2 V / 58.8 V at IT = 1.0 mA - defines precise clamping onset threshold for overvoltage detection |
| VWM | 47.8 V - maximum continuous reverse working voltage before leakage exceeds 1.0 µA |
| VC @ IPPM | 77.0 V at 5.2 A - clamped voltage during 400 W transient, limiting stress on downstream ICs |
| IPPM | 5.2 A with 10/1000 µs waveform - peak surge current capability under standardized lightning/surge test |
| PPPM | 400 W - peak pulse power handling capacity, derated above 25 °C per Fig. 2 |
| RθJA | 120 °C/W - thermal resistance from junction to ambient, critical for layout pad sizing and reliability margining |
| AEC-Q101 | Qualified - validated for automotive-grade temperature cycling, humidity, and mechanical robustness |
Pinout & Package
Package: SMA (DO-214AC), surface-mount, low-profile plastic case with matte tin-plated leads solderable per J-STD-002 and JESD 22-B102. Cathode indicated by band; polarity-critical for unidirectional operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Anode | Forward conduction terminal | Connected to protected line (e.g., VIN or signal trace); conducts during forward surge or bias |
| Cathode | Reverse-biased clamping terminal | Connected to ground or lower-potential rail; avalanches to clamp transients above VBR |
Key Features
| Feature | Design Value |
|---|---|
| 400 W peak pulse power (10/1000 µs) | Enables robust protection against IEC 61000-4-5 Level 3 surges (1 kV/2 Ω) without derating in standard layouts |
| Glass passivated junction | Ensures stable VBR over temperature and lifetime, with <0.1 %/°C tempco for predictable clamping |
| AEC-Q101 qualification | Validates suitability for automotive powertrain, body control, and ADAS modules requiring zero-failure field reliability |
| MSL Level 1 (260 °C peak) | Supports standard lead-free reflow without pre-baking, reducing manufacturing complexity and cost |
| UL 497B recognized (QVGQ2) | Meets safety agency requirements for telecom and industrial equipment surge protection circuits |
Applications
| Automotive Power Supply Protection | Industrial Sensor Signal Line Clamping |
|---|---|
|
Use Scenario: Protecting 12 V/24 V battery-fed ECUs from load-dump transients and alternator ripple. IC Role / Device Role / Timing Role: Unidirectional TVS placed between input rail and chassis ground to clamp spikes up to ±100 V. Use Value: Limits voltage seen by downstream DC-DC converters and microcontrollers to ≤77.0 V, preventing latch-up or gate oxide damage. |
Use Scenario: Shielding analog outputs of pressure/temperature sensors in factory automation PLCs. IC Role / Device Role / Timing Role: Low-capacitance TVS on 0–5 V or 4–20 mA signal paths to suppress ESD and relay-induced transients. Use Value: Maintains signal integrity with <1 nA leakage at 47.8 V, avoiding offset errors while clamping >1 kV ESD events. |
| Telecom Interface Surge Protection | Consumer Device USB Power Line Protection |
|
Use Scenario: Safeguarding Ethernet PHY power pins (e.g., MDI-X) against lightning-induced surges in outdoor access points. IC Role / Device Role / Timing Role: Primary clamping device on 3.3 V or 5 V bias rails feeding PoE interface ICs. Use Value: Responds in <1 ns to divert 5.2 A surge current, holding rail voltage below 77.0 V to prevent PHY latch-up or reset. |
Use Scenario: Adding secondary overvoltage protection on USB VBUS lines in portable chargers and docking stations. IC Role / Device Role / Timing Role: Standby TVS parallel to primary OVP IC, activated only during abnormal AC adapter faults or hot-plug transients. Use Value: Withstands 40 A IFSM, surviving repeated 12 V overvoltage events without degradation, extending product lifecycle. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar transient voltage suppression applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SMBJ56A-E3/52 (Vishay) | Higher 600 W PPPM, SMB (DO-214AA) package, 10% larger footprint, same VBR/VC specs | Better suited for higher-energy surges where board space allows larger package | Select when system-level surge testing requires >400 W margin or legacy SMB layout exists |
| 1.5SMC56A (ON Semiconductor) | Same VBR range and PPPM, SMC (DO-214AB) package, 20% larger than SMA, slightly higher RθJA (130 °C/W) | Used in industrial power supplies where SMC's higher IFSM (50 A) adds margin | Choose if existing SMC footprint is fixed or higher surge repetition rate demands enhanced thermal mass |
Compared with P4SMA56AHE3_A/H, SMBJ56A-E3/52 offers greater surge headroom in a larger package, while 1.5SMC56A provides identical electrical protection with increased physical robustness and thermal inertia - both require PCB layout changes and are not pin-compatible replacements.
Availability
P4SMA56AHE3_A/H is available at Aetrix Electronics and suitable for automotive electronics, industrial sensor interfaces, and telecom infrastructure requiring stable component supply, AEC-Q101 compliance, and consistent TVS performance across production batches.
Supply support for P4SMA56AHE3_A/H includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay General Semiconductor designs and manufactures discrete semiconductors including diodes, rectifiers, and TVS devices, with emphasis on reliability, precision, and application-specific validation.
The P4SMA Series targets cost-sensitive, high-volume surge protection needs in automotive, industrial, and consumer systems - delivering AEC-Q101 qualified TVS performance in compact SMA packages without sacrificing clamping accuracy or thermal stability.
FAQ
What is the maximum clamping voltage of the P4SMA56AHE3_A/H under a 10/1000 µs surge?
The P4SMA56AHE3_A/H has a maximum clamping voltage (VC) of 77.0 V at 5.2 A peak pulse current (IPPM) with a 10/1000 µs waveform. This value is measured per Figure 1 in the Vishay datasheet (Doc. #88367, Rev. 09-Jan-2024) and defines the upper voltage limit imposed on protected circuitry during standardized surge events. The P4SMA56AHE3_A/H maintains this clamping performance across its full operating temperature range (–65 °C to +150 °C).
Is the P4SMA56AHE3_A/H suitable for automotive applications?
Yes, the P4SMA56AHE3_A/H is AEC-Q101 qualified and explicitly designated for automotive use via its "HE3" suffix and "_A/H" revision code. It undergoes stress testing for temperature cycling, humidity, mechanical shock, and high-temperature operating life per AEC-Q101 requirements. The P4SMA56AHE3_A/H is commonly deployed in engine control units, body electronics, and infotainment power rails where transient immunity and long-term reliability are mandatory.
What does the "HE3" suffix indicate in P4SMA56AHE3_A/H?
The "HE3" suffix in P4SMA56AHE3_A/H denotes RoHS-compliant construction with AEC-Q101 qualification and matte tin-plated terminations meeting J-STD-002 solderability standards. Per Vishay's ordering information (Doc. #88367, page 3), "HE3" identifies the commercial-grade, automotive-qualified variant with MSL Level 1 rating and UL 497B recognition - distinguishing it from non-automotive "E3" or halogen-free "HM3" versions.
How does the P4SMA56AHE3_A/H compare to bidirectional TVS diodes like P4SMA56CA?
The P4SMA56AHE3_A/H is unidirectional and intended for DC-biased lines where polarity is fixed (e.g., VCC-to-ground protection), offering tighter VBR tolerance and lower leakage than bidirectional variants. In contrast, P4SMA56CA protects AC or floating signals but exhibits higher reverse leakage and symmetric clamping. The P4SMA56AHE3_A/H cannot substitute for P4SMA56CA in AC-coupled applications without circuit redesign due to polarity dependence and asymmetric conduction behavior.
What is the thermal resistance (RθJA) of the P4SMA56AHE3_A/H, and how does it affect PCB layout?
The P4SMA56AHE3_A/H has a typical junction-to-ambient thermal resistance (RθJA) of 120 °C/W when mounted on minimum recommended copper pads (0.2" × 0.2", 5.0 mm × 5.0 mm per terminal). This value directly impacts safe power dissipation: at 25 °C ambient, the device can sustain ~3.3 W continuously only with adequate copper area. Reducing pad size increases RθJA, risking thermal runaway during repetitive surges - so the P4SMA56AHE3_A/H must be laid out per Vishay's specified mounting pad dimensions to meet its rated specifications.
P4SMA56AHE3_A/H Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Package/Case:
- DO-214AC, SMA
- Series:
- P4SMA, TransZorb®
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 1
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 47.8V
- Voltage - Breakdown (Min):
- 53.2V
- Voltage - Clamping (Max) @ Ipp:
- 77V
- Current - Peak Pulse (10/1000µs):
- 5.2A
- Power - Peak Pulse:
- 400W
- Power Line Protection:
- No
- Applications:
- -
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -65°C ~ 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DO-214AC (SMA)
P4SMA56AHE3_A/H FAQ
1.How can I place an order for P4SMA56AHE3_A/H through Aetrix?
Please submit a Request for Quotation (RFQ) for P4SMA56AHE3_A/H on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for P4SMA56AHE3_A/H reliable?
The price and inventory of P4SMA56AHE3_A/H are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for P4SMA56AHE3_A/H is usually 5 days.
3.What payment methods are accepted for P4SMA56AHE3_A/H?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for P4SMA56AHE3_A/H transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for P4SMA56AHE3_A/H?
P4SMA56AHE3_A/H orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your P4SMA56AHE3_A/H order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for P4SMA56AHE3_A/H?
For technical support, including P4SMA56AHE3_A/H datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your P4SMA56AHE3_A/H requirements.
6.How does Aetrix verify that P4SMA56AHE3_A/H is sourced from the original manufacturer or authorized distributors?
All P4SMA56AHE3_A/H products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P4SMA56AHE3_A/H meets industry standards.
7.What is the process for return or replacement of P4SMA56AHE3_A/H?
All P4SMA56AHE3_A/H units undergo pre-shipment inspection (PSI). If there is an issue with P4SMA56AHE3_A/H, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P4SMA56AHE3_A/H part is unused and in its original packaging.
Return procedure for P4SMA56AHE3_A/H:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
P4SMA56AHE3_A/H Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

