Vishay General Semiconductor - Diodes Division P6SMB56CAHE3_A/I
- Part No.:
- P6SMB56CAHE3_A/I
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Category:
- TVS Diodes
- Package:
- DO-214AA, SMB
- Datasheet:
-
P6SMB56CAHE3_A/I.pdf
- Description:
- TVS DIODE 47.8VWM 77VC DO214AA
- Quantity:
- Payment:

- Shipping:

Inventory:7,127
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Product details
Overview
P6SMB56CAHE3_A/I from Vishay General Semiconductor is a bidirectional surface-mount Transient Voltage Suppressor (TVS) diode in the SMB (DO-214AA) package, rated for 600 W peak pulse power with a 10/1000 μs waveform, 56 V standoff voltage (VWM), and 77 V maximum clamping voltage (VC) at 7.8 A peak pulse current - deployed for robust overvoltage protection on signal lines and power rails in automotive sensor interfaces and industrial control I/O.
For engineers reviewing the P6SMB56CAHE3_A/I datasheet, P6SMB56CAHE3_A/I pinout, P6SMB56CAHE3_A/I application, or P6SMB56CAHE3_A/I equivalent, key selection criteria include bidirectional clamping symmetry, AEC-Q101 qualification status, 150 °C junction temperature rating, low incremental surge resistance, and compatibility with automated SMT assembly on 0.2" × 0.2" copper pads.
Technical Context
This device operates as a voltage-clamped transient protector with symmetrical breakdown behavior in both polarities due to its bidirectional construction. It features glass-passivated junctions, meets MSL Level 1 per J-STD-020, and delivers sub-nanosecond response time to ESD and lightning-induced surges.
Designed for repetitive surge duty cycles up to 0.01 %, it sustains 600 W peak pulse power under standardized 10/1000 μs waveforms while maintaining clamping voltage ≤ 77 V at IPPM = 7.8 A - enabling reliable protection of downstream MOSFETs, microcontrollers, and analog front-ends without latch-up or thermal runaway.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VWM (Stand-off Voltage) | 56 V - maximum continuous reverse operating voltage before conduction begins; defines safe operating margin below clamping threshold |
| VBR (Breakdown Voltage) | 60.0–66.0 V at 1 mA test current - precise voltage threshold where avalanche conduction initiates in either polarity |
| VC (Clamping Voltage) | 77 V at 7.8 A IPPM - peak voltage seen by protected circuit during worst-case transient; critical for IC survivability |
| PPPM (Peak Pulse Power) | 600 W - energy-handling capacity under 10/1000 μs waveform; enables protection against IEC 61000-4-5 Level 4 surges |
| TJ max. | 150 °C - maximum junction temperature; supports operation in under-hood automotive and high-ambient industrial environments |
| Package | SMB (DO-214AA) - industry-standard surface-mount outline with 0.220" × 0.130" footprint; optimized for reflow and wave soldering |
| AEC-Q101 Qualified | Yes - qualified for automotive applications per stress test standard; indicated by HE3 suffix and revision code "A" |
Pinout & Package
Package: SMB (DO-214AA), surface-mount, bidirectional configuration with no polarity marking - terminals are symmetrical and interchangeable.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Anode / Cathode (symmetrical) | Bidirectional terminal pair | No functional distinction between leads; either terminal serves as anode or cathode depending on transient polarity |
Key Features
| Feature | Design Value |
|---|---|
| 600 W peak pulse power (10/1000 μs) | Enables compliance with IEC 61000-4-5 surge immunity requirements up to 4 kV in system-level testing |
| AEC-Q101 qualified (HE3 suffix) | Validated for automotive-grade reliability including temperature cycling, HTRB, and ESD robustness per AEC stress protocols |
| Low clamping ratio (VC/VBR ≈ 1.21) | Minimizes overvoltage stress on protected ICs - critical for safeguarding 3.3 V or 5 V logic interfaces |
| MSL Level 1 moisture sensitivity | Allows unlimited floor life and standard reflow profiles without baking; simplifies manufacturing logistics |
| Glass-passivated junction | Ensures stable leakage performance (<1 μA at VWM) and long-term reliability under humidity and thermal cycling |
Applications
| Automotive Sensor Interface Protection | Industrial PLC Digital I/O Protection |
|---|---|
Use Scenario: Protecting CAN transceiver signal lines and LIN bus inputs from load-dump and inductive switching transients in engine control modules. IC Role / Device Role / Timing Role: Bidirectional voltage clamp placed directly at connector entry point to shunt surge energy before reaching PHY layer. Use Value: Maintains signal integrity under ±77 V clamping while surviving repeated 600 W pulses - extends lifetime of automotive-grade transceivers. |
Use Scenario: Safeguarding 24 V digital input channels in programmable logic controllers exposed to relay coil flyback and field wiring surges. IC Role / Device Role / Timing Role: Primary transient suppressor across input terminals, coordinated with series impedance for current limiting. Use Value: Limits transient voltage to ≤77 V during 10/1000 μs events, preventing false triggering and latch-up in optocoupler input stages. |
| Telecom Line Card Surge Protection | Consumer Appliance Motor Control Board |
Use Scenario: Shielding Ethernet PHY power rails and data lines on telecom line cards from lightning-induced surges entering via external ports. IC Role / Device Role / Timing Role: Secondary-level TVS deployed after gas discharge tube (GDT) primary protection to handle residual fast-rising transients. Use Value: Sub-ns response ensures clamping occurs before GDT ionization completes - critical for protecting sensitive PHY ICs. |
Use Scenario: Suppressing commutation spikes from brushed DC motors in washing machine control boards operating in harsh EMI environments. IC Role / Device Role / Timing Role: Clamp placed across motor terminals and MCU GPIO lines to absorb inductive kickback energy. Use Value: Withstands 100 A IFSM surge current and maintains <1 μA leakage at 56 V - prevents standby power drain and false resets. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar transient voltage suppression applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SMAJ56CA | Same 56 V VWM and bidirectional SMB package, but rated for 400 W PPPM (vs. 600 W); lower clamping voltage (70 V @ 5.7 A) | Lower power handling limits use in high-energy surge environments like industrial mains-connected equipment | Select when lower clamping voltage is prioritized over peak energy absorption; verify IEC 61000-4-5 level compatibility |
| 1.5KE56CA | Through-hole DO-15 package, 600 W rating, same VWM/VC specs, but larger footprint and incompatible with SMT-only lines | Not suitable for space-constrained or fully automated PCB assembly; requires wave solder or hand-solder process | Choose only if legacy through-hole design or higher thermal mass is required; not drop-in compatible with P6SMB56CAHE3_A/I layout |
Compared with SMAJ56CA and 1.5KE56CA, P6SMB56CAHE3_A/I uniquely combines AEC-Q101 qualification, 600 W surge capability, SMB surface-mount form factor, and bidirectional symmetry - making it the preferred choice for new automotive and high-reliability industrial designs requiring zero-layout-change scalability.
Availability
P6SMB56CAHE3_A/I is available at Aetrix Electronics and suitable for automotive sensor modules, industrial PLC I/O cards, telecom line cards, and consumer appliance motor control boards requiring stable component supply with full traceability and long-term lifecycle support.
Supply support for P6SMB56CAHE3_A/I includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay General Semiconductor is a global leader in discrete semiconductors, specializing in diodes, rectifiers, MOSFETs, and protection devices with emphasis on reliability, efficiency, and application-specific optimization.
The P6SMB Series targets high-energy transient suppression in automotive, industrial, and communications systems - engineered for AEC-Q101 compliance, low clamping ratios, and seamless integration into automated SMT production lines.
FAQ
What does the "CA" suffix mean in P6SMB56CAHE3_A/I?
The "CA" suffix in P6SMB56CAHE3_A/I denotes a bidirectional configuration - meaning the device provides symmetrical transient voltage suppression in both polarities, with identical breakdown and clamping characteristics regardless of voltage polarity applied across its terminals. This eliminates the need for polarity-aware placement during assembly and ensures consistent protection for AC-coupled or differential signal paths.
Is P6SMB56CAHE3_A/I suitable for automotive applications?
Yes, P6SMB56CAHE3_A/I is AEC-Q101 qualified, as confirmed by the "HE3" suffix and revision code "A", indicating full compliance with the automotive stress test standard for transient suppressors. It supports operating junction temperatures up to 150 °C and has passed temperature cycling, highly accelerated life testing (HALT), and ESD robustness validation - making it approved for under-hood and body-control module deployments.
What is the maximum clamping voltage of P6SMB56CAHE3_A/I and at what current is it specified?
The maximum clamping voltage (VC) of P6SMB56CAHE3_A/I is 77 V, measured at a peak pulse current (IPPM) of 7.8 A under the standardized 10/1000 μs double-exponential waveform. This value represents the worst-case voltage imposed on the protected circuit during a surge event and is critical for ensuring downstream ICs remain within their absolute maximum ratings.
Does P6SMB56CAHE3_A/I require special PCB layout considerations?
Yes - for optimal surge performance, P6SMB56CAHE3_A/I must be mounted on minimum recommended 0.2" × 0.2" (5.0 mm × 5.0 mm) copper pads per terminal to ensure adequate thermal dissipation and low-inductance path to ground. Short, direct traces to protected nodes and minimized loop area are essential to preserve its sub-nanosecond response time and prevent voltage overshoot during fast transients.
How does the HE3 suffix differ from E3 or M3 in the P6SMB56CAHE3_A/I part number?
The "HE3" suffix in P6SMB56CAHE3_A/I indicates RoHS-compliant construction with AEC-Q101 qualification, whereas "E3" denotes RoHS-compliant commercial grade only, and "M3" adds halogen-free compliance. The "H" prefix specifically signals automotive qualification, and the trailing "A/I" denotes revision "A" and 13-inch tape-and-reel packaging (3200 units per reel), ensuring full traceability and production readiness.
P6SMB56CAHE3_A/I Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Package/Case:
- DO-214AA, SMB
- Series:
- P6SMB, TransZorb®
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 47.8V
- Voltage - Breakdown (Min):
- 53.2V
- Voltage - Clamping (Max) @ Ipp:
- 77V
- Current - Peak Pulse (10/1000µs):
- 7.8A
- Power - Peak Pulse:
- 600W
- Power Line Protection:
- No
- Applications:
- -
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -65°C ~ 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DO-214AA (SMB)
P6SMB56CAHE3_A/I FAQ
1.How can I place an order for P6SMB56CAHE3_A/I through Aetrix?
Please submit a Request for Quotation (RFQ) for P6SMB56CAHE3_A/I on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for P6SMB56CAHE3_A/I reliable?
The price and inventory of P6SMB56CAHE3_A/I are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for P6SMB56CAHE3_A/I is usually 5 days.
3.What payment methods are accepted for P6SMB56CAHE3_A/I?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for P6SMB56CAHE3_A/I transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for P6SMB56CAHE3_A/I?
P6SMB56CAHE3_A/I orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your P6SMB56CAHE3_A/I order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for P6SMB56CAHE3_A/I?
For technical support, including P6SMB56CAHE3_A/I datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your P6SMB56CAHE3_A/I requirements.
6.How does Aetrix verify that P6SMB56CAHE3_A/I is sourced from the original manufacturer or authorized distributors?
All P6SMB56CAHE3_A/I products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P6SMB56CAHE3_A/I meets industry standards.
7.What is the process for return or replacement of P6SMB56CAHE3_A/I?
All P6SMB56CAHE3_A/I units undergo pre-shipment inspection (PSI). If there is an issue with P6SMB56CAHE3_A/I, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P6SMB56CAHE3_A/I part is unused and in its original packaging.
Return procedure for P6SMB56CAHE3_A/I:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
P6SMB56CAHE3_A/I Tags

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DESD3V3E1BL-7B
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Diodes Incorporated

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Diodes Incorporated

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Diodes Incorporated

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onsemi

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Diodes Incorporated

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Diodes Incorporated

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Nexperia USA Inc.

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Toshiba Semiconductor and Storage

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Diodes Incorporated
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