Vishay General Semiconductor - Diodes Division P6SMB75CA-E3/5B
- Part No.:
- P6SMB75CA-E3/5B
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Category:
- TVS Diodes
- Package:
- DO-214AA, SMB
- Datasheet:
-
P6SMB75CA-E3/5B.pdf
- Description:
- TVS DIODE 64.1VWM 103VC DO214AA
- Quantity:
- Payment:

- Shipping:

Inventory:3,416
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
P6SMB75CA-E3/5B from Vishay General Semiconductor is a bidirectional surface-mount Transient Voltage Suppressor (TVS) diode designed for robust overvoltage protection in DC power rails and signal lines. It features a 75 V standoff voltage (VWM), 82.9 V minimum breakdown voltage (VBR), 103 V maximum clamping voltage (VC) at 5.8 A peak pulse current, and 600 W peak pulse power capability with a 10/1000 μs waveform - deployed in automotive sensor interfaces, industrial I/O modules, and telecom line cards.
For engineers reviewing the P6SMB75CA-E3/5B datasheet, P6SMB75CA-E3/5B pinout, P6SMB75CA-E3/5B application, or P6SMB75CA-E3/5B equivalent, key selection criteria include bidirectional clamping symmetry, low clamping ratio (VC/VBR ≈ 1.24), AEC-Q101 qualification status, SMB (DO-214AA) package thermal performance, and compatibility with automated SMT assembly under J-STD-002 solderability standards.
Technical Context
The P6SMB75CA-E3/5B operates as a silicon avalanche diode with symmetrical bidirectional conduction, enabling identical clamping behavior for positive and negative transients without polarity dependency. Its glass-passivated junction ensures stable breakdown characteristics and low leakage (<1 μA at 64.1 V), while the low incremental surge resistance supports fast energy diversion during ESD or lightning-induced surges.
Thermally, it exhibits RθJA = 100 °C/W and RθJL = 20 °C/W, requiring PCB copper pad area per Vishay's recommended 0.2" × 0.2" (5.0 mm × 5.0 mm) layout to sustain 600 W pulses. The device is rated for TJ = -65 °C to +150 °C and meets MSL Level 1 per J-STD-020 with 260 °C reflow peak.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VWM (Stand-off) | 64.1 V - Maximum continuous reverse voltage before significant leakage; defines operating rail margin for 75 V nominal systems. |
| VBR (Breakdown) | 71.3–78.8 V at 1 mA - Avalanche onset range; ensures reliable triggering above normal operating voltage with tight tolerance. |
| VC (Clamping) | 103 V at 5.8 A (10/1000 μs) - Peak voltage seen by protected circuit during surge; determines downstream component voltage stress. |
| PPPM | 600 W - Surge energy handling capacity; enables protection against IEC 61000-4-5 Level 3 (1 kV/2 Ω) transients on 24–48 V lines. |
| ID (Leakage) | <1 μA at VWM - Minimal standby power loss and signal integrity impact in high-impedance sensor or data lines. |
| TJ max. | +150 °C - Enables operation in under-hood automotive or enclosed industrial enclosures without derating. |
| Package | SMB (DO-214AA) - Standardized SMT footprint (4.57 mm × 3.94 mm × 2.20 mm); compatible with high-volume pick-and-place and reflow processes. |
Pinout & Package
Package: SMB (DO-214AA), surface-mount, bidirectional - no polarity marking; symmetrical terminal configuration.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Anode / Cathode (symmetrical) | Transient conduction path | Identical bidirectional avalanche behavior; either terminal serves as input/output for AC-coupled or floating lines. |
| Case (cathode band absent) | Thermal and mechanical interface | Exposed metal slug provides primary heat path to PCB copper; requires minimum 5.0 mm × 5.0 mm pad per terminal for rated PPPM. |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional clamping | Enables single-device protection of AC signals, differential buses (e.g., RS-485), or ungrounded power domains without polarity concerns. |
| 600 W peak pulse power | Supports IEC 61000-4-5 surge immunity up to 1 kV open-circuit / 0.5 kV short-circuit on 24–48 V systems with minimal board space. |
| MSL Level 1 rating | Allows unlimited floor life and standard 260 °C lead-free reflow without baking, reducing manufacturing overhead in high-mix SMT lines. |
| AEC-Q101 qualified (HE3/HM3 variants) | Validated for automotive applications including body control modules and ADAS sensor interfaces; P6SMB75CA-E3/5B is commercial-grade but shares same die and construction. |
| Glass-passivated junction | Ensures long-term parameter stability and low leakage drift across temperature and humidity cycles in industrial environments. |
Applications
| Automotive Sensor Protection | Industrial PLC I/O Protection |
|---|---|
|
Use Scenario: Protecting CAN FD or LIN bus transceivers from load-dump and jump-start transients in vehicle door modules. IC Role / Device Role: Bidirectional TVS placed between transceiver pins and connector, shunting ±100 V spikes to ground. Use Value: Clamps to ≤103 V within nanoseconds, preventing damage to 75 V-rated transceivers while maintaining signal integrity below 1 μA leakage. |
Use Scenario: Safeguarding 24 V DC digital input channels on programmable logic controllers exposed to relay coil flyback and ESD. IC Role / Device Role: Primary transient suppressor on field-side input traces, mounted directly at connector entry point. Use Value: Absorbs 600 W surges without degradation, enabling >100,000 surge events per device per IEC 61000-4-5 testing requirements. |
| Telecom Line Card Surge Protection | Consumer Power Adapter Input Stage |
|
Use Scenario: Front-end protection of PoE-powered Ethernet switches against lightning-induced common-mode surges on RJ45 ports. IC Role / Device Role: Bidirectional TVS on each twisted pair, referenced to chassis ground via low-inductance path. Use Value: Symmetrical clamping ensures balanced suppression across differential pairs, preserving signal skew and common-mode rejection. |
Use Scenario: Secondary-side overvoltage clamp in 12 V/24 V wall adapters protecting USB-C PD negotiation circuits. IC Role / Device Role: Standoff-limited TVS across output capacitor, triggered only during fault conditions like feedback loop failure. Use Value: 64.1 V VWM allows safe operation under 120% load regulation while limiting fault voltage to 103 V - below IC absolute maximum ratings. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar transient voltage suppression applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SMAJ75CA | Same SMB package, 75 V VWM, but lower PPPM (400 W) and higher VC (121 V at 4.9 A). | Limited to lower-energy transients (e.g., IEC 61000-4-2 ESD only); insufficient for IEC 61000-4-5 surge on 48 V lines. | Select when cost sensitivity outweighs surge margin and board space allows parallel devices for power scaling. |
| 1.5SMC75CA | Higher-power SMC package (1500 W PPPM), same VWM/VC specs, larger footprint (7.11 mm × 6.22 mm). | Used where system-level surge tests require >600 W headroom or extended thermal mass is needed for repetitive surges. | Choose when PCB layout permits larger package and thermal design targets >1000 W transient absorption. |
Compared with SMAJ75CA and 1.5SMC75CA, the P6SMB75CA-E3/5B delivers optimal balance of 600 W surge capability, SMB footprint constraints, and production-ready manufacturability - making it preferred for space-constrained automotive and industrial modules requiring AEC-Q101-compatible construction.
Availability
P6SMB75CA-E3/5B is available at Aetrix Electronics and suitable for automotive sensor interfaces, industrial PLC I/O protection, and telecom line card surge suppression requiring stable component supply, RoHS-compliant commercial-grade TVS diodes with SMB packaging and 13" tape-and-reel delivery.
Supply support for P6SMB75CA-E3/5B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay General Semiconductor is a global leader in discrete semiconductors, specializing in diodes, MOSFETs, optoelectronics, and passive components with emphasis on reliability, power efficiency, and automotive qualification.
The P6SMB Series is engineered for high-reliability transient suppression in harsh environments - targeting automotive, industrial, and telecom applications where consistent clamping performance, AEC-Q101 compliance, and automated assembly compatibility are mandatory.
FAQ
What does the "CA" suffix indicate in P6SMB75CA-E3/5B?
The "CA" suffix denotes a bidirectional configuration: the P6SMB75CA-E3/5B provides symmetrical clamping for both positive and negative voltage transients, unlike unidirectional "A" variants. This makes it suitable for AC-coupled lines, differential buses, or floating grounds where polarity is undefined - a critical distinction confirmed in Vishay's P6SMB datasheet revision 09-Jan-2024, page 1.
Is P6SMB75CA-E3/5B AEC-Q101 qualified?
No - P6SMB75CA-E3/5B is RoHS-compliant commercial-grade with E3 suffix. AEC-Q101 qualification applies only to variants with HE3 or HM3 suffixes (e.g., P6SMB75CAHE3_B). The P6SMB75CA-E3/5B shares identical die and SMB package construction but lacks the extended automotive test validation required for AEC-Q101 certification.
What is the maximum clamping voltage of P6SMB75CA-E3/5B and under what test condition?
The P6SMB75CA-E3/5B has a maximum clamping voltage (VC) of 103 V, measured at 5.8 A peak pulse current using a 10/1000 μs double-exponential waveform per IEC 61000-4-5. This value is specified in the Electrical Characteristics table on page 2 of the Vishay P6SMB datasheet (Doc. #88370, rev. 09-Jan-2024) and defines the worst-case voltage imposed on protected circuitry during surge events.
Can P6SMB75CA-E3/5B be used in place of a unidirectional TVS like P6SMB75A-E3/5B?
No - P6SMB75CA-E3/5B is bidirectional and lacks polarity marking, while P6SMB75A-E3/5B is unidirectional with cathode band identification. Substitution requires verifying circuit topology: bidirectional use is mandatory for AC signals or floating references; unidirectional is required for DC rails with defined ground reference. Interchange may cause improper clamping or failure to trigger.
What is the thermal resistance and recommended PCB layout for P6SMB75CA-E3/5B?
The P6SMB75CA-E3/5B has RθJA = 100 °C/W and RθJL = 20 °C/W. Vishay specifies mounting on 0.2" × 0.2" (5.0 mm × 5.0 mm) copper pads per terminal to achieve rated 600 W pulse power. Smaller pads cause thermal derating - e.g., 0.1" pads reduce PPPM by ~35%. Layout details appear in the Mechanical Data section (page 1) and Fig. 2 (derating curve) of the P6SMB datasheet.
P6SMB75CA-E3/5B Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Package/Case:
- DO-214AA, SMB
- Series:
- P6SMB, TransZorb®
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 64.1V
- Voltage - Breakdown (Min):
- 71.3V
- Voltage - Clamping (Max) @ Ipp:
- 103V
- Current - Peak Pulse (10/1000µs):
- 5.8A
- Power - Peak Pulse:
- 600W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -65°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DO-214AA (SMB)
P6SMB75CA-E3/5B FAQ
1.How can I place an order for P6SMB75CA-E3/5B through Aetrix?
Please submit a Request for Quotation (RFQ) for P6SMB75CA-E3/5B on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for P6SMB75CA-E3/5B reliable?
The price and inventory of P6SMB75CA-E3/5B are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for P6SMB75CA-E3/5B is usually 5 days.
3.What payment methods are accepted for P6SMB75CA-E3/5B?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for P6SMB75CA-E3/5B transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for P6SMB75CA-E3/5B?
P6SMB75CA-E3/5B orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your P6SMB75CA-E3/5B order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for P6SMB75CA-E3/5B?
For technical support, including P6SMB75CA-E3/5B datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your P6SMB75CA-E3/5B requirements.
6.How does Aetrix verify that P6SMB75CA-E3/5B is sourced from the original manufacturer or authorized distributors?
All P6SMB75CA-E3/5B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P6SMB75CA-E3/5B meets industry standards.
7.What is the process for return or replacement of P6SMB75CA-E3/5B?
All P6SMB75CA-E3/5B units undergo pre-shipment inspection (PSI). If there is an issue with P6SMB75CA-E3/5B, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P6SMB75CA-E3/5B part is unused and in its original packaging.
Return procedure for P6SMB75CA-E3/5B:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
P6SMB75CA-E3/5B Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

