Vishay General Semiconductor - Diodes Division P6SMB75CAHE3/52
- Part No.:
- P6SMB75CAHE3/52
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Category:
- TVS Diodes
- Package:
- DO-214AA, SMB
- Datasheet:
-
P6SMB75CAHE3/52.pdf
- Description:
- TVS DIODE 64.1VWM 103VC DO214AA
- Quantity:
- Payment:

- Shipping:

Inventory:2,145
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
P6SMB75CAHE3/52 from Vishay General Semiconductor is a bidirectional surface-mount Transient Voltage Suppressor (TVS) diode in the SMB (DO-214AA) package, rated for 75 V standoff voltage (VWM), 103 V maximum clamping voltage (VC) at 5.8 A peak pulse current (IPPM), and 600 W peak pulse power (10/1000 μs waveform). It protects sensitive signal lines and power rails in automotive and industrial electronics against ESD, lightning surges, and inductive switching transients.
For engineers reviewing the P6SMB75CAHE3/52 datasheet, P6SMB75CAHE3/52 pinout, P6SMB75CAHE3/52 application, or P6SMB75CAHE3/52 equivalent, this device is selected for robust bidirectional overvoltage protection where AEC-Q101 qualification, low clamping ratio (1.37×VWM), and MSL Level 1 reflow compatibility are required.
Technical Context
This bidirectional TVS operates symmetrically across both polarities, with breakdown voltage (VBR) specified at 71.3–78.8 V (min/max) under 1 mA test current. Its clamping behavior is characterized by low incremental surge resistance and fast response time (<1 ns), enabling effective suppression of transient energy before downstream components experience overstress.
The device is thermally rated for junction temperatures up to +150 °C, with thermal resistance from junction-to-ambient (RθJA) of 100 °C/W on standard 0.2" × 0.2" copper pads. It meets JESD201 Class 2 whisker resistance and is RoHS-compliant with matte tin-plated leads solderable per J-STD-002.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VWM (Stand-off) | 64.1 V - Maximum continuous reverse working voltage before significant leakage; defines safe operating margin below clamping threshold. |
| VC @ IPPM | 103 V at 5.8 A - Clamped voltage during 10/1000 μs surge; limits stress on protected ICs or MOSFETs. |
| PPPM | 600 W - Peak pulse power handling capability; determines survivability against standardized lightning/surge events. |
| IPPM | 5.8 A - Peak pulse current corresponding to VC; used to size PCB trace width and verify system-level surge compliance. |
| TJ max. | +150 °C - Maximum junction temperature; supports operation in under-hood automotive and high-ambient industrial environments. |
| MSL Level | Level 1 (J-STD-020) - No floor life limitation; allows unlimited exposure to ambient conditions prior to reflow. |
| AEC-Q101 | Qualified - Validated for automotive applications including engine control units, body electronics, and ADAS sensor interfaces. |
Pinout & Package
Package: SMB (DO-214AA), surface-mount, low-profile case with matte tin-plated terminals. Cathode band not marked (bidirectional configuration).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Anode | Transient return path (bidirectional) | Provides symmetrical conduction path during positive or negative polarity transients; no polarity marking required. |
| Cathode | Transient return path (bidirectional) | Electrically identical to anode in CA devices; forms dual-junction structure enabling equal clamping in both directions. |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional clamping | Enables single-device protection of AC-coupled or floating signal lines without polarity concerns. |
| 600 W peak pulse power (10/1000 μs) | Meets IEC 61000-4-5 Level 3 (1 kV line-to-line, 2 kV line-to-earth) surge immunity requirements. |
| AEC-Q101 qualified (HE3 suffix) | Validated for automotive-grade reliability including temperature cycling, HTRB, and ESD testing per AEC standards. |
| Low clamping ratio (VC/VWM = 1.37) | Minimizes voltage overshoot during transients, reducing risk of latch-up or gate oxide damage in protected MOSFETs/ICs. |
| MSL Level 1 & JESD201 Class 2 | Supports high-volume automated SMT assembly without baking or special handling prior to reflow. |
Applications
| Automotive Sensor Interface Protection | Industrial CAN Bus Line Protection |
|---|---|
Use Scenario: Protecting analog sensor outputs (e.g., pressure, temperature) in engine control modules from load dump and alternator ripple. IC Role / Device Role / Timing Role: Bidirectional TVS placed across differential signal pair or supply-to-ground to clamp transients before reaching ADC input or op-amp front-end. Use Value: Prevents sensor signal corruption and microcontroller reset events caused by >100 V spikes, leveraging 64.1 V VWM headroom and 103 V clamping. |
Use Scenario: Safeguarding CANH/CANL lines in vehicle body control units against ESD and coupled noise from nearby solenoid drivers. IC Role / Device Role / Timing Role: Low-capacitance bidirectional suppressor installed as common-mode clamp between CANH–CANL and chassis ground. Use Value: Maintains CAN signal integrity up to 1 Mbps by limiting transient-induced common-mode offset to <103 V without adding timing skew. |
| Telecom Power Rail Clamp | Consumer USB Port ESD Protection |
Use Scenario: Secondary-side overvoltage protection on 48 V telecom DC-DC converter outputs feeding PoE-powered equipment. IC Role / Device Role / Timing Role: Standoff-rated TVS connected between output rail and ground to absorb residual surge energy after primary-stage MOV suppression. Use Value: Provides precise 64.1 V clamping threshold aligned with 48 V nominal rail tolerance, avoiding false triggering while ensuring sub-103 V stress on downstream regulators. |
Use Scenario: Board-level ESD protection for USB 2.0 data lines (D+/D−) in smart home hubs and set-top boxes. IC Role / Device Role / Timing Role: Bidirectional suppressor placed differentially across D+/D− to shunt ±15 kV contact discharge energy per IEC 61000-4-2. Use Value: Achieves <0.5 pF typical junction capacitance (per Vishay P6SMB series curves), preserving signal rise/fall times without degrading eye diagram integrity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bidirectional TVS protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SMAJ75CA | Same VWM (64.1 V), lower PPPM (400 W), SMA package (larger footprint, higher RθJA). | Limited to lower-energy transients; unsuitable for IEC 61000-4-5 Level 3 compliance. | Select when cost sensitivity outweighs surge rating and board space permits larger SMA footprint. |
| SMCJ75CA | Same VWM, higher PPPM (1500 W), SMC package (3.5 mm × 7.0 mm vs. SMB's 3.94 mm × 2.20 mm). | Overqualified for most 600 W use cases; adds unnecessary height and layout area. | Choose only when system-level surge testing exceeds 600 W or long-term derating margin is critical. |
Compared with SMAJ75CA and SMCJ75CA, P6SMB75CAHE3/52 delivers optimal balance of AEC-Q101 qualification, 600 W surge capacity, and compact SMB footprint-making it the preferred choice for space-constrained automotive and industrial PCBs requiring validated reliability and precise clamping.
Availability
P6SMB75CAHE3/52 is available at Aetrix Electronics and suitable for automotive sensor interfaces, industrial CAN bus nodes, telecom power rails, and consumer USB port protection requiring stable component supply and AEC-Q101 assurance.
Supply support for P6SMB75CAHE3/52 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay General Semiconductor designs and manufactures discrete semiconductors including diodes, rectifiers, and TVS devices, with emphasis on high-reliability, automotive-qualified, and industry-standard components.
The P6SMB Series targets surface-mount transient suppression in automotive, industrial, and telecom systems where compact size, AEC-Q101 validation, and consistent 600 W surge performance are essential design requirements.
FAQ
What does the "CA" suffix indicate in P6SMB75CAHE3/52?
The "CA" suffix denotes a bidirectional configuration: P6SMB75CAHE3/52 provides symmetrical transient suppression for both positive and negative voltage excursions, unlike unidirectional variants (e.g., P6SMB75A). This eliminates polarity concerns during placement and enables protection of AC-coupled or floating circuits without external diode pairing. The device achieves this via a back-to-back PN junction structure internal to the SMB package.
Is P6SMB75CAHE3/52 suitable for IEC 61000-4-5 surge testing?
Yes, P6SMB75CAHE3/52 is rated for 600 W peak pulse power with a 10/1000 μs waveform, meeting IEC 61000-4-5 Level 3 (1 kV line-to-line, 2 kV line-to-earth) requirements when properly mounted on 0.2" × 0.2" copper pads. Its 103 V clamping voltage at 5.8 A ensures protected circuitry remains within safe operating limits during standardized surge events, provided layout minimizes parasitic inductance.
How does the HE3 suffix affect P6SMB75CAHE3/52's qualification status?
The HE3 suffix indicates RoHS-compliant construction and full AEC-Q101 qualification, including stress tests for temperature cycling, high-temperature reverse bias (HTRB), and ESD (HBM ≥ 8 kV, CDM ≥ 1 kV). This distinguishes it from commercial-grade E3 variants and validates its use in automotive powertrain, chassis, and ADAS modules where long-term reliability under thermal and mechanical stress is mandatory.
What is the thermal resistance of P6SMB75CAHE3/52, and how does it impact layout?
P6SMB75CAHE3/52 has a typical junction-to-ambient thermal resistance (RθJA) of 100 °C/W when mounted on 0.2" × 0.2" copper pads per terminal. To maintain TJ ≤ 150 °C under sustained 5.0 W power dissipation, designers must ensure adequate copper area and avoid thermal bottlenecks-such as narrow traces or insufficient vias-to the inner ground/power planes. Derating above 25 °C ambient is required per Figure 2 in the datasheet.
Can P6SMB75CAHE3/52 be used in place of a unidirectional TVS like P6SMB75A?
No-P6SMB75CAHE3/52 is electrically and physically incompatible with unidirectional replacements. Its bidirectional structure lacks cathode marking and conducts equally in both directions, whereas P6SMB75A requires correct polarity orientation and clamps only in reverse bias. Substituting one for the other risks improper transient shunting, increased leakage, or failure to protect during positive-going surges on unidirectional designs.
P6SMB75CAHE3/52 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Package/Case:
- DO-214AA, SMB
- Series:
- P6SMB, TransZorb®
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Discontinued at Digi-Key
- Type:
- Zener
- Unidirectional Channels:
- -
- Bidirectional Channels:
- 1
- Voltage - Reverse Standoff (Typ):
- 64.1V
- Voltage - Breakdown (Min):
- 71.3V
- Voltage - Clamping (Max) @ Ipp:
- 103V
- Current - Peak Pulse (10/1000µs):
- 5.8A
- Power - Peak Pulse:
- 600W
- Power Line Protection:
- No
- Applications:
- -
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -65°C ~ 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DO-214AA (SMB)
P6SMB75CAHE3/52 FAQ
1.How can I place an order for P6SMB75CAHE3/52 through Aetrix?
Please submit a Request for Quotation (RFQ) for P6SMB75CAHE3/52 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for P6SMB75CAHE3/52 reliable?
The price and inventory of P6SMB75CAHE3/52 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for P6SMB75CAHE3/52 is usually 5 days.
3.What payment methods are accepted for P6SMB75CAHE3/52?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for P6SMB75CAHE3/52 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for P6SMB75CAHE3/52?
P6SMB75CAHE3/52 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your P6SMB75CAHE3/52 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for P6SMB75CAHE3/52?
For technical support, including P6SMB75CAHE3/52 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your P6SMB75CAHE3/52 requirements.
6.How does Aetrix verify that P6SMB75CAHE3/52 is sourced from the original manufacturer or authorized distributors?
All P6SMB75CAHE3/52 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that P6SMB75CAHE3/52 meets industry standards.
7.What is the process for return or replacement of P6SMB75CAHE3/52?
All P6SMB75CAHE3/52 units undergo pre-shipment inspection (PSI). If there is an issue with P6SMB75CAHE3/52, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The P6SMB75CAHE3/52 part is unused and in its original packaging.
Return procedure for P6SMB75CAHE3/52:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
P6SMB75CAHE3/52 Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

