Nexperia USA Inc. PBSS4041SN,115
- Part No.:
- PBSS4041SN,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
PBSS4041SN,115.pdf
- Description:
- TRANS 2NPN DUAL 60V 6.7A 8-SO
- Quantity:
- Payment:

- Shipping:

Inventory:7,346
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PBSS4041SN,115 from Nexperia is a dual NPN low VCEsat BISS transistor in SOT96-1 (SO8) package, rated for 60 V VCEO, 6.7 A continuous collector current, and 32–48 mΩ RCEsat at IC = 4 A / IB = 200 mA. It serves as a high-efficiency power switch in battery-powered load management and motor drive circuits.
For engineers reviewing the PBSS4041SN,115 datasheet, PBSS4041SN,115 pinout, PBSS4041SN,115 application, or PBSS4041SN,115 equivalent, key selection criteria include verified dual-NPN topology, sub-100 mV VCEsat at 1 A, thermal resistance down to 55 K/W on ceramic PCB, and SO8 footprint compatibility with high-current PCB layout requirements.
Technical Context
This device integrates two independent NPN transistors in a single SO8 package, sharing no internal connection between TR1 and TR2 sections. Each transistor supports independent base drive and operates with fully decoupled collector-emitter paths.
Its BISS (Breakthrough In Small Signal) architecture delivers high hFE (150–500) across 500 mA–6 A IC, enabling robust current gain at high switching loads without external bias networks. Saturation behavior is characterized under pulsed conditions (tp ≤ 300 μs, duty ≤ 2%), ensuring stable performance in PWM-driven power stages.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 60 V - Maximum safe blocking voltage per transistor with base open; enables use in 24 V and 48 V industrial bus systems. |
| IC | 6.7 A - Continuous DC collector current per transistor; supports sustained load switching up to ~80 W at 12 V with appropriate heatsinking. |
| RCEsat | 32–48 mΩ - Measured at IC = 4 A / IB = 200 mA; directly determines conduction loss (≤ 768 mW at 4 A) and thermal rise. |
| hFE | 150–500 - DC current gain at IC = 4–6 A; ensures reliable saturation with modest base drive (e.g., 20–40 mA per transistor). |
| ton/toff | 100 ns / 1270 ns - Turn-on/turn-off times at IC = 1 A; suitable for <100 kHz PWM switching with controlled fall-time limiting EMI. |
| Tj max | 150 °C - Absolute maximum junction temperature; defines thermal design margin when operating at Ptot = 1.7 W on ceramic PCB. |
| Ptot (per device) | 2.3 W - Total dissipation limit on Al2O3 ceramic PCB; enables higher power density than standard FR4 layouts. |
Pinout & Package
SOT96-1 (SO8) plastic surface-mount package with 3.9 mm body width, 1.27 mm lead pitch, and exposed collector pads for thermal enhancement. Pin 1 index located at top-left corner of marking side.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Emitter TR1 | Low-impedance emitter node for first transistor; connects to ground or low-side return path. |
| 2 | Base TR1 | Control input for TR1; requires ~20–40 mA drive for full saturation at 4–6 A IC. |
| 3 | Emitter TR2 | Independent emitter node for second transistor; electrically isolated from TR1 emitter. |
| 4 | Base TR2 | Separate control input for TR2; allows asynchronous or complementary switching of both transistors. |
| 5, 6 | Collector TR2 | Parallel-connected collector terminals for TR2; intended for high-current output routing to load. |
| 7, 8 | Collector TR1 | Parallel-connected collector terminals for TR1; provides low-inductance, high-current path to load or supply rail. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent NPN topology | Enables two-channel load switching or half-bridge configuration without external isolation components. |
| Ultra-low RCEsat (32 mΩ typ.) | Reduces conduction loss by >50% vs. conventional small-signal transistors at 4 A, lowering thermal stress on PCB. |
| High hFE at high IC | Maintains ≥150 gain up to 6 A, allowing direct MCU GPIO drive without intermediate buffer stages. |
| SO8 thermal pad compatibility | Supports solderable copper area under pins 5–8 for enhanced heat transfer; achieves Rth(j-a) = 55 K/W on ceramic substrate. |
| 15 A peak ICM | Withstands short-duration inrush currents (e.g., motor startup, capacitor charging) without latch-up or degradation. |
Applications
| Motor Drive Switching | Battery Protection Circuit |
|---|---|
|
Use Scenario: Controlling brushed DC motors in portable tools and robotics where bidirectional drive is not required but high efficiency and compact size are critical. IC Role / Device Role / Timing Role: Dual NPN configured as parallel high-side switches or independent low-side drivers for dual-motor control. Use Value: Sub-100 mV VCEsat at 4 A reduces power loss by ~300 mW per channel versus standard transistors, extending battery runtime by 5–8% in 12 V systems. |
Use Scenario: Overcurrent and reverse-polarity protection in USB-C PD power banks and multi-cell Li-ion packs. IC Role / Device Role / Timing Role: One transistor acts as main discharge switch; the other implements fast-shutdown path during fault detection. Use Value: 1270 ns toff enables response within 1.3 μs to overcurrent events, meeting IEC 62368-1 fault-clearing timing requirements. |
| DC-DC Converter Synchronous Rectification | Industrial Load Switching |
|
Use Scenario: Replacing Schottky diodes in 24 V input buck converters for telecom and PoE-powered equipment. IC Role / Device Role / Timing Role: Used as active rectifier in secondary-side synchronous rectification stage, driven by gate controller. Use Value: 32 mΩ RCEsat yields <0.5 V forward drop at 4 A, cutting conduction loss by 65% compared to 40 V/5 A Schottky diode. |
Use Scenario: Solid-state replacement for electromechanical relays in PLC I/O modules and HVAC control panels. IC Role / Device Role / Timing Role: Dual-channel switching of resistive and inductive loads (e.g., solenoids, indicator LEDs, fans) from microcontroller outputs. Use Value: 6.7 A per channel supports 100 W resistive loads at 24 V; SO8 footprint replaces two discrete SOT23 devices, saving 42% board area. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-NPN power switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DMN3026LSD-13 | Single-channel 30 V, 6.2 A N-channel MOSFET in SO8; requires gate driver for logic-level operation. | Lower VDS(on) (26 mΩ) but lacks integrated dual topology; needs external level shifting for 3.3 V MCU control. | Select when lower RDS(on) and zero gate current are prioritized over simplicity and bipolar drive compatibility. |
| PBSS4041SPN | PNP/PNP complement in same SOT96-1 package; identical pinout and thermal specs but opposite polarity. | Enables complementary push-pull or H-bridge configurations where both sourcing and sinking capability are needed. | Select when building bidirectional motor drivers or level-translating interfaces requiring matched thermal and package characteristics. |
Compared with DMN3026LSD-13, PBSS4041SN,115 eliminates gate-drive complexity and supports direct 5 V MCU control, while PBSS4041SPN enables symmetrical high-side/low-side pairing without layout mismatch-both alternatives require revalidation of drive strength and thermal coupling in shared SO8 footprints.
Availability
PBSS4041SN,115 is available at Aetrix Electronics and suitable for battery-driven devices, power management subsystems, and motor control applications requiring stable component supply and long-term industrial availability.
Supply support for PBSS4041SN,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in automotive-grade and industrial power transistors.
PBSS4041SN,115 belongs to Nexperia's BISS transistor product line, engineered specifically for high-current, low-loss switching in space-constrained battery-operated and power-management systems.
FAQ
What is the maximum continuous collector current per transistor in PBSS4041SN,115?
The maximum continuous collector current (IC) per transistor is 6.7 A at Tamb ≤ 25 °C with appropriate PCB copper area. Derating applies above 25 °C ambient; for example, IC drops to ~4.2 A at 75 °C ambient on FR4 with 1 cm² collector pad, per the power derating curve in Figure 1.
Can PBSS4041SN,115 be used in linear (analog) amplification mode?
No-PBSS4041SN,115 is optimized for saturated switching operation, not linear amplification. Its hFE variation across IC (75–500) and lack of guaranteed fT linearity above 100 MHz make it unsuitable for analog gain stages. It is specified only for switching applications with defined VCEsat, ton/toff, and RCEsat parameters.
How does the SO8 package improve thermal performance over SOT23 or SOT89?
The SOT96-1 (SO8) package provides two large collector terminals (pins 5/6 and 7/8) that can be soldered to extended copper pours, achieving Rth(j-a) as low as 55 K/W on ceramic PCB-nearly 3× better than typical SOT23 (150+ K/W). This allows 2.3 W total dissipation versus ≤0.5 W for SOT23 equivalents at same ambient.
Is PBSS4041SN,115 pin-compatible with any PNP dual transistors?
Yes-PBSS4041SPN is its direct PNP/PNP complement in identical SOT96-1 package with matching pinout (emitter/base/collector assignments reversed per transistor). Both share identical mechanical dimensions, thermal curves, and marking format (4041SPN), enabling drop-in replacement in complementary designs.
PBSS4041SN,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Transistor Type:
- 2 NPN (Dual)
- Current - Collector (Ic) (Max):
- 6.7A
- Voltage - Collector Emitter Breakdown (Max):
- 60V
- Vce Saturation (Max) @ Ib, Ic:
- 350mV @ 350mA, 7A
- Current - Collector Cutoff (Max):
- 100nA
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 150 @ 4A, 2V
- Power - Max:
- 2.3W
- Frequency - Transition:
- 130MHz
- Operating Temperature:
- 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SO
PBSS4041SN,115 FAQ
1.How can I place an order for PBSS4041SN,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PBSS4041SN,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PBSS4041SN,115 reliable?
The price and inventory of PBSS4041SN,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PBSS4041SN,115 is usually 5 days.
3.What payment methods are accepted for PBSS4041SN,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PBSS4041SN,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PBSS4041SN,115?
PBSS4041SN,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PBSS4041SN,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PBSS4041SN,115?
For technical support, including PBSS4041SN,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PBSS4041SN,115 requirements.
6.How does Aetrix verify that PBSS4041SN,115 is sourced from the original manufacturer or authorized distributors?
All PBSS4041SN,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PBSS4041SN,115 meets industry standards.
7.What is the process for return or replacement of PBSS4041SN,115?
All PBSS4041SN,115 units undergo pre-shipment inspection (PSI). If there is an issue with PBSS4041SN,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PBSS4041SN,115 part is unused and in its original packaging.
Return procedure for PBSS4041SN,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PBSS4041SN,115 Tags

-
MBT3946DW1T1G
onsemi

-
BC846BPDW1T1G
onsemi

-
MBT2222ADW1T1G
onsemi

-
BC847BDW1T1G
onsemi

-
DMMT5401-7-F
Diodes Incorporated

-
DMMT5551-7-F
Diodes Incorporated

-
DMMT3904W-7-F
Diodes Incorporated

-
DMMT3906W-7-F
Diodes Incorporated

-
FMB3904
onsemi

-
FMB2222A
onsemi

-
ULQ2003D1013TR
STMicroelectronics

-
ZXTD4591E6TA
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

