Nexperia USA Inc. PBSS4130PAN,115
- Part No.:
- PBSS4130PAN,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays
- Package:
- 6-UFDFN Exposed Pad
- Datasheet:
-
PBSS4130PAN,115.pdf
- Description:
- TRANS 2NPN 30V 1A 6HUSON
- Quantity:
- Payment:

- Shipping:

Inventory:14,556
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PBSS4130PAN,115 from Nexperia is a dual NPN low VCE(sat) BISS transistor in DFN2020-6 (SOT1118) package, designed for high-efficiency load switching with 30 V VCEO, 1 A continuous IC, and 190 mΩ RCE(sat) at IC = 1 A / IB = 0.1 A. It serves as a compact, thermally enhanced power switch in battery-powered motor drivers and USB-C charging circuits.
For engineers reviewing the PBSS4130PAN,115 datasheet, PBSS4130PAN,115 pinout, PBSS4130PAN,115 application, or PBSS4130PAN,115 equivalent, key selection criteria include verified dual-NPN topology, AEC-Q101 qualification, thermal resistance down to 86 K/W on 4-layer PCBs, and validated saturation performance under pulsed 1 A loads at 25 °C ambient.
Technical Context
This device integrates two matched NPN transistors in a single leadless DFN2020-6 package, sharing no internal connection between units-each has independent emitter, base, and collector terminals. Its BISS architecture delivers higher hFE (180–270 at IC = 1 A) and lower VCE(sat) than standard small-signal transistors, enabling efficient switching without external bias resistors in many configurations.
It operates within −55 °C to 150 °C junction temperature range, supports peak IC up to 2 A (tp ≤ 1 ms), and maintains stable RCE(sat) across temperature due to optimized epitaxial structure. The 0.65 mm profile and thermal pad-compatible footprint enable high-density PCB layouts in space-constrained automotive and portable power modules.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 30 V - Maximum safe collector-emitter voltage with base open; defines maximum supply rail compatibility in 24 V automotive and industrial systems. |
| IC (continuous) | 1 A - Continuous DC collector current per transistor; enables direct drive of small motors, LEDs, or MOSFET gates without external amplification. |
| RCE(sat) | 190 mΩ - Measured at IC = 1 A / IB = 0.1 A, pulsed; determines conduction loss (0.19 W at 1 A), critical for thermal management in sealed enclosures. |
| hFE | 180–270 - DC current gain at IC = 1 A / VCE = 2 V; ensures reliable saturation with modest base drive (e.g., 5.6 mA from MCU GPIO). |
| Tj(max) | 150 °C - Absolute maximum junction temperature; allows operation in under-hood automotive environments with appropriate PCB copper area. |
| AEC-Q101 | Qualified - Certified for automotive discrete applications per stress test requirements; validates reliability for engine control, body electronics, and ADAS subsystems. |
Pinout & Package
Package: DFN2020-6 (SOT1118), 2.0 × 2.0 × 0.65 mm, thermally enhanced ultra-thin SMD plastic package with exposed thermal pad (pin 4 is E2, not thermal pad; thermal path is via soldered bottom surface).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | E1 | Emitter of Transistor 1 - Connected to low-side return path; must be routed to ground plane or low-impedance node for optimal saturation. |
| 2 | B1 | Base of Transistor 1 - Requires current-limited drive (max 0.3 A DC); typical 10 kΩ pull-down used when inactive. |
| 3 | C2 | Collector of Transistor 2 - High-side switching node; connects to load supply; shares package thermal mass with C1. |
| 4 | E2 | Emitter of Transistor 2 - Independent emitter node; enables dual low-side or complementary half-bridge configurations. |
| 5 | B2 | Base of Transistor 2 - Electrically isolated from B1; supports independent control of second transistor for sequential or mirrored switching. |
| 6 | C1 | Collector of Transistor 1 - Primary high-current output terminal; rated for 1 A continuous; ties directly to load anode or gate driver input. |
Key Features
| Feature | Design Value |
|---|---|
| Low VCE(sat) | 150–190 mV at IC = 1 A / IB = 100 mA - Reduces conduction loss by >40% vs. standard BJT, lowering heat sink requirements in fan/motor drivers. |
| Dual NPN integration | Two fully isolated transistors in one 2×2 mm footprint - Eliminates inter-device layout mismatch, saves 30% board area vs. discrete dual-transistor solutions. |
| High hFE at full load | 180–270 at IC = 1 A - Enables direct MCU GPIO drive (e.g., 3.3 V/20 mA source) without base resistors or level shifters in many cases. |
| Thermal performance | Rth(j-a) = 86 K/W on 4-layer PCB with 1 cm² collector pad - Supports 1.45 W dissipation at 25 °C ambient, sufficient for intermittent 1 A loads. |
| AEC-Q101 qualification | Stress-tested per automotive discrete standard - Validates long-term reliability in temperature cycling, humidity, and mechanical shock environments. |
Applications
| Load Switching | Battery Management |
|---|---|
|
Use Scenario: Controlling power delivery to auxiliary modules (e.g., GPS tracker, CAN transceiver) in 12 V automotive systems. IC Role / Device Role / Timing Role: Dual-NPN acts as independent high-side switches, enabling selective wake-up and sleep-state isolation. Use Value: 190 mΩ RCE(sat) limits dropout to <0.2 V at 1 A, preserving battery voltage headroom during cold-cranking conditions. |
Use Scenario: Managing charge path between USB-C PD input and Li-ion battery in portable medical devices. IC Role / Device Role / Timing Role: One transistor handles input OR-ing; the other controls battery discharge enable, coordinated via microcontroller. Use Value: Matched hFE and VCE(sat) ensure balanced current sharing and identical turn-on timing across both paths. |
| Motor Control | Power Conversion |
|
Use Scenario: Driving 5 V/300 mA cooling fans in industrial PLCs with PWM-controlled speed regulation. IC Role / Device Role / Timing Role: Single transistor used in low-side PWM switch configuration; second reserved for fault-indicator LED drive. Use Value: 365 ns turn-off time (toff) supports PWM frequencies up to 200 kHz without shoot-through risk in multi-phase designs. |
Use Scenario: Gate driving for synchronous rectifier MOSFETs in 5 V buck converters for FPGA core supplies. IC Role / Device Role / Timing Role: Functions as bipolar gate driver stage, delivering fast 100 mA peak base current to reduce MOSFET ton/toff. Use Value: 1.1 V VBE(sat) at IC = 1 A ensures full enhancement of logic-level MOSFETs even at elevated temperatures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-NPN switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PBSS4130PANP | NPN/PNP complementary pair in same DFN2020-6 package; PNP section has VCEO = −30 V, IC = −1 A, RCE(sat) = 220 mΩ. | Enables true complementary output stages (e.g., push-pull drivers) where bidirectional current flow or level-shifting is required. | Select when designing H-bridge legs or level translators needing matched NPN+PNP characteristics. |
| DMN3020LSD-13 | Single-channel 30 V, 4.2 A N-channel MOSFET in SOT-23; RDS(on) = 30 mΩ @ VGS = 4.5 V; no gate drive current requirement. | Replaces BJT switching with lower conduction loss but requires ≥4.5 V gate drive; unsuitable for 3.3 V-only MCU control without level shift. | Choose for higher efficiency at >500 mA loads where gate drive voltage and PCB area allow SOT-23 placement. |
Compared with PBSS4130PAN,115, PBSS4130PANP provides complementary polarity for analog signal inversion or rail-to-rail output, while DMN3020LSD-13 offers lower RDS(on) but demands higher gate voltage and lacks integrated dual topology-requiring two devices for equivalent functionality.
Availability
PBSS4130PAN,115 is available at Aetrix Electronics and suitable for automotive body control modules, portable medical device power sequencing, and industrial motor driver reference designs requiring stable component supply and AEC-Q101 compliance.
Supply support for PBSS4130PAN,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability essential semiconductors for automotive, industrial, and consumer markets, with manufacturing rooted in process innovation and quality rigor.
PBSS4130PAN,115 belongs to Nexperia's BISS transistor product line, engineered specifically for high-efficiency, space-constrained power switching in automotive and battery-operated systems where low VCE(sat) and AEC-Q101 validation are mandatory.
FAQ
Is PBSS4130PAN,115 pin-compatible with standard SOT-363 or SC-88 packages?
No. PBSS4130PAN,115 uses the DFN2020-6 (SOT1118) package with 2.0 × 2.0 mm body and 0.5 mm pin pitch-mechanically and thermally distinct from SOT-363 (2.1 × 1.25 mm) or SC-88 (2.0 × 1.25 mm). Footprint and solder stencil must follow Nexperia's recommended land pattern in Figure 21 of the datasheet.
Can both transistors be used simultaneously in a single-phase inverter leg?
Yes, but not as a half-bridge. Each transistor is electrically isolated; they can drive separate loads or function as parallel-connected switches (with current-sharing resistors) for >1 A total current. For true high-side/low-side switching, use PBSS4130PANP (NPN+PNP) or discrete MOSFETs with gate drivers.
What is the maximum allowable base current for continuous operation?
The absolute maximum DC base current is 0.3 A per transistor (Table 5). For reliable long-term operation at 25 °C ambient, limit continuous IB to ≤100 mA-verified in datasheet conditions for RCE(sat) and thermal derating curves. Pulse base current up to 1 A is allowed for tp ≤ 1 ms.
Does the thermal pad on the DFN2020-6 package require electrical connection?
No. The exposed copper pad on the underside is purely thermal-it has no electrical function and must be soldered to a dedicated thermal pad on the PCB (not connected to any signal net). Per Figure 21, the recommended solder land is 0.875 × 0.875 mm with 0.45 mm solder mask opening.
PBSS4130PAN,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-UFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 2 NPN (Dual)
- Current - Collector (Ic) (Max):
- 1A
- Voltage - Collector Emitter Breakdown (Max):
- 30V
- Vce Saturation (Max) @ Ib, Ic:
- 100mV @ 50mA, 500mA
- Current - Collector Cutoff (Max):
- 100nA (ICBO)
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 210 @ 500mA, 2V
- Power - Max:
- 510mW
- Frequency - Transition:
- 165MHz
- Operating Temperature:
- 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-HUSON (2x2)
PBSS4130PAN,115 FAQ
1.How can I place an order for PBSS4130PAN,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PBSS4130PAN,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PBSS4130PAN,115 reliable?
The price and inventory of PBSS4130PAN,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PBSS4130PAN,115 is usually 5 days.
3.What payment methods are accepted for PBSS4130PAN,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PBSS4130PAN,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PBSS4130PAN,115?
PBSS4130PAN,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PBSS4130PAN,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PBSS4130PAN,115?
For technical support, including PBSS4130PAN,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PBSS4130PAN,115 requirements.
6.How does Aetrix verify that PBSS4130PAN,115 is sourced from the original manufacturer or authorized distributors?
All PBSS4130PAN,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PBSS4130PAN,115 meets industry standards.
7.What is the process for return or replacement of PBSS4130PAN,115?
All PBSS4130PAN,115 units undergo pre-shipment inspection (PSI). If there is an issue with PBSS4130PAN,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PBSS4130PAN,115 part is unused and in its original packaging.
Return procedure for PBSS4130PAN,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PBSS4130PAN,115 Tags

-
MBT3946DW1T1G
onsemi

-
BC846BPDW1T1G
onsemi

-
MBT2222ADW1T1G
onsemi

-
BC847BDW1T1G
onsemi

-
DMMT5401-7-F
Diodes Incorporated

-
DMMT5551-7-F
Diodes Incorporated

-
DMMT3904W-7-F
Diodes Incorporated

-
DMMT3906W-7-F
Diodes Incorporated

-
FMB3904
onsemi

-
FMB2222A
onsemi

-
ULQ2003D1013TR
STMicroelectronics

-
ZXTD4591E6TA
Diodes Incorporated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

