Nexperia USA Inc. PBSS5255PAPSX
- Part No.:
- PBSS5255PAPSX
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays
- Package:
- 6-UDFN Exposed Pad
- Datasheet:
-
PBSS5255PAPSX.pdf
- Description:
- TRANS 2PNP 55V 2A DFN2020D-6
- Quantity:
- Payment:

- Shipping:

Inventory:2,615
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Product details
Overview
PBSS5255PAPSX from Nexperia is a PNP/PNP low VCEsat (BISS) double transistor in DFN2020D-6 (SOT1118D) package, designed for high-efficiency load switching with −55 V VCEO, −2 A continuous IC, and −300 mV typical VCEsat at IC = −0.7 A / IB = −7 mA. It serves as dual high-current switch in battery-powered power management and LED lighting circuits.
For engineers reviewing the PBSS5255PAPSX datasheet, PBSS5255PAPSX pinout, PBSS5255PAPSX application, or PBSS5255PAPSX equivalent, this page delivers verified electrical specs, thermal derating curves, dual-transistor terminal mapping, and AOI-compatible SMT mounting guidance for compact DC-DC and charging circuit design.
Technical Context
This dual PNP BISS transistor integrates two matched high-gain, low-saturation transistors sharing a thermally enhanced DFN2020D-6 package with side-wettable flanks. Each transistor supports independent operation with open-base VCEO = −55 V and peak ICM = −3 A under 1 ms pulses.
Its BISS architecture delivers hFE = 50–75 at IC = −2 A and VCE = −2 V, with RCEsat as low as 250 mΩ at IC = −1 A / IB = −50 mA - enabling minimal conduction loss in space-constrained load-switching nodes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | −55 V per transistor: maximum safe collector-emitter blocking voltage with base open, defining system-level overvoltage margin in battery disconnect applications. |
| IC | −2 A continuous: rated DC collector current per transistor, supporting sustained 2 A load switching without forced cooling on standard FR4 PCBs. |
| VCEsat | −300 to −420 mV at IC = −0.7 A / IB = −7 mA: ultra-low saturation voltage enables <150 mW conduction loss per transistor at 0.7 A, critical for energy-sensitive portable devices. |
| hFE | 50–75 at IC = −2 A / VCE = −2 V: high DC current gain ensures reliable saturation with modest base drive, reducing MCU GPIO loading in discrete switch designs. |
| RCEsat | 250 mΩ max at IC = −1 A / IB = −50 mA: quantified on-resistance simplifies thermal modeling and PCB copper area calculation for thermal management. |
| Ptot | 700 mW per device on 4-layer FR4 with 1 cm² collector pad: total power dissipation limit defines maximum combined losses across both transistors under steady-state conditions. |
| fT | 100 MHz at VCE = −10 V / IC = −500 mA: transition frequency confirms suitability for medium-speed switching (e.g., PWM dimming up to ~100 kHz) without excessive delay. |
Pinout & Package
DFN2020D-6 (SOT1118D) is a 2.0 mm × 2.0 mm × 0.65 mm leadless, thermally enhanced plastic package with side-wettable flanks for automated optical inspection (AOI) and improved solder joint reliability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | E1 | Emitter of transistor TR1: primary current return path for first PNP switch; connected to system ground or low-side reference in high-side switch configurations. |
| 2 | B1 | Base of transistor TR1: control input requiring negative bias relative to E1 to turn on TR1; driven by MCU GPIO or level-shifted logic. |
| 3 | C2 | Collector of transistor TR2: high-current output node for second PNP switch; routed to load (e.g., motor winding or LED string anode). |
| 4 | E2 | Emitter of transistor TR2: return path for TR2; may be tied to common rail or independently biased depending on dual-switch topology. |
| 5 | B2 | Base of transistor TR2: independent control input for TR2; enables asynchronous or complementary switching of both transistors. |
| 6 | C1 | Collector of transistor TR1: main power output for TR1; used for primary load switching or current sensing via external shunt. |
Key Features
| Feature | Design Value |
|---|---|
| Low VCEsat | −300 mV typical at IC = −0.7 A reduces conduction loss by >40% vs. standard PNP transistors, extending battery life in portable chargers. |
| Exposed thermal pad | Integrated bottom-side thermal pad in DFN2020D-6 enables ≤131 K/W Rth(j-a) on 4-layer PCB with 1 cm² collector pad, allowing 700 mW total dissipation without heatsink. |
| Side-wettable flanks | Solderable side pads support automated optical inspection (AOI) of solder joints, improving manufacturing yield and field-reliability in high-volume consumer electronics. |
| High hFE at full load | hFE ≥50 at IC = −2 A ensures robust saturation with ≤200 mA base drive, eliminating need for Darlington stages or base resistors in compact layouts. |
| Bi-directional thermal symmetry | Matched thermal resistance profiles for both transistors enable balanced power sharing in dual-load or H-bridge half-bridge configurations. |
Applications
| Battery Load Switch | LED Constant-Current Driver |
|---|---|
|
Use Scenario: Discrete on/off control of Li-ion battery output to peripheral modules (e.g., Bluetooth radio, sensor array) during sleep mode. IC Role / Device Role / Timing Role: Dual PNP switch isolates battery from loads; TR1 controls main power rail, TR2 enables auxiliary bias sequencing. Use Value: −300 mV VCEsat limits voltage drop to <300 mV at 0.7 A, preserving >95% of battery voltage for downstream LDOs and minimizing self-heating. |
Use Scenario: Linear constant-current regulation for automotive interior LED strips powered from 12 V supply. IC Role / Device Role / Timing Role: TR1 acts as pass transistor with feedback-controlled base drive; TR2 provides thermal foldback protection via emitter-coupled sensing. Use Value: hFE = 75 at IC = −1 A enables precise 100 mA–1 A current setting with <1% drift over temperature, avoiding external op-amps. |
| USB-C Power Delivery Switch | Fan/Motor Speed Control |
|
Use Scenario: Bidirectional 5–20 V power path switching in USB-C port controllers handling sink/source role negotiation. IC Role / Device Role / Timing Role: TR1 and TR2 operate in complementary mode to route power between CC logic and VBUS lines with reverse-polarity protection. Use Value: −55 V VCEO withstands 20 V PD transient surges; side-wettable flanks ensure AOI-verified solder integrity for safety-critical power routing. |
Use Scenario: PWM-controlled 12 V DC fan driver in industrial gateway enclosures with ambient temperatures up to 75 °C. IC Role / Device Role / Timing Role: TR1 handles main PWM switching; TR2 drives gate of external N-channel MOSFET for high-side boost, forming hybrid driver stage. Use Value: RCEsat = 250 mΩ at IC = −1 A keeps junction temperature rise <45 K on 4-layer PCB, eliminating thermal throttling at 100% duty cycle. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual PNP switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| DMT3020LSDQ | −30 V VCEO, −2.2 A IC, −220 mV VCEsat (lower voltage rating, lower VCEsat) | Optimized for 3.3–5 V systems only; unsuitable for 12–24 V battery management or LED drivers. | Select when operating below 30 V and prioritizing lowest possible saturation loss over voltage headroom. |
| BC847BDW1T1G | −45 V VCEO, −100 mA IC, −650 mV VCEsat (lower current, higher VCEsat, same package) | Rated for signal-level switching only; cannot sustain 2 A loads or deliver comparable thermal performance. | Choose only for low-power bias networks or logic-level translation where 2 A capability is unnecessary. |
Compared with DMTC3020LSDQ and BC847BDW1T1G, PBSS5255PAPSX uniquely balances −55 V blocking, −2 A current, and −300 mV VCEsat in a 2 mm × 2 mm footprint - making it the sole option for compact, high-efficiency 12–24 V dual-switch designs requiring AOI compatibility and thermal headroom.
Availability
PBSS5255PAPSX is available at Aetrix Electronics and suitable for battery-driven devices, LED lighting systems, and power management modules requiring stable component supply, consistent parametric performance, and long-term production continuity.
Supply support for PBSS5255PAPSX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance, reliable discrete and logic devices for automotive, industrial, and consumer markets.
PBSS5255PAPSX belongs to Nexperia's BISS (Breakthrough In Small Signal) transistor family, engineered specifically for high-current, low-loss switching in space-constrained portable and battery-powered applications.
FAQ
What is the maximum allowable junction temperature for PBSS5255PAPSX?
The absolute maximum junction temperature (Tj) is 150 °C, as defined in the Absolute Maximum Ratings table. Operation above this temperature risks permanent degradation of hFE and increased leakage. Derating is required above 25 °C ambient - for example, total power must be reduced to ≤510 mW on standard FR4 at 75 °C ambient.
Can PBSS5255PAPSX be used in automotive applications?
No - PBSS5255PAPSX is explicitly non-automotive qualified per the revision history (v.2, April 2023), which states "Product changed to non-automotive qualification." It lacks AEC-Q101 stress testing and automotive-grade process controls; use only in industrial, consumer, or commercial equipment.
How does the DFN2020D-6 package support automated optical inspection (AOI)?
The package features side-wettable flanks (SWF): solderable metal sidewalls on all six terminals that reflect light uniformly during AOI. This enables high-confidence detection of solder bridging, insufficient fill, and misalignment - unlike conventional DFN packages with hidden solder joints.
What is the recommended PCB layout for optimal thermal performance?
For best thermal performance, use a 4-layer FR4 board with ≥1 cm² exposed copper pad connected to pins 3 (C2) and 6 (C1) via multiple thermal vias to internal ground/power planes. The datasheet specifies 131 K/W Rth(j-a) under these conditions - 35% lower than single-layer board performance.
PBSS5255PAPSX Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-UDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 2 PNP (Dual)
- Current - Collector (Ic) (Max):
- 2A
- Voltage - Collector Emitter Breakdown (Max):
- 55V
- Vce Saturation (Max) @ Ib, Ic:
- 450mV @ 200mA, 2A
- Current - Collector Cutoff (Max):
- 100nA
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 110 @ 1A, 2V
- Power - Max:
- 370mW
- Frequency - Transition:
- 100MHz
- Operating Temperature:
- 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DFN2020D-6
PBSS5255PAPSX FAQ
1.How can I place an order for PBSS5255PAPSX through Aetrix?
Please submit a Request for Quotation (RFQ) for PBSS5255PAPSX on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PBSS5255PAPSX reliable?
The price and inventory of PBSS5255PAPSX are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PBSS5255PAPSX is usually 5 days.
3.What payment methods are accepted for PBSS5255PAPSX?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PBSS5255PAPSX transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PBSS5255PAPSX?
PBSS5255PAPSX orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PBSS5255PAPSX order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PBSS5255PAPSX?
For technical support, including PBSS5255PAPSX datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PBSS5255PAPSX requirements.
6.How does Aetrix verify that PBSS5255PAPSX is sourced from the original manufacturer or authorized distributors?
All PBSS5255PAPSX products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PBSS5255PAPSX meets industry standards.
7.What is the process for return or replacement of PBSS5255PAPSX?
All PBSS5255PAPSX units undergo pre-shipment inspection (PSI). If there is an issue with PBSS5255PAPSX, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PBSS5255PAPSX part is unused and in its original packaging.
Return procedure for PBSS5255PAPSX:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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