Nexperia USA Inc. PBSS5260PAP,115
- Part No.:
- PBSS5260PAP,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays
- Package:
- 6-UFDFN Exposed Pad
- Datasheet:
-
PBSS5260PAP,115.pdf
- Description:
- TRANS 2PNP 60V 2A 6HUSON
- Quantity:
- Payment:

- Shipping:

Inventory:13,878
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Product details
Overview
PBSS5260PAP from Nexperia is a dual PNP low VCEsat BISS transistor in DFN2020-6 (SOT1118) package, rated for −60 V VCEO, −2 A IC, and 250 mΩ RCEsat at −1 A/−100 mA drive. It delivers high current gain (hFE = 50–75 at −2 A), AEC-Q101 qualification, and thermal resistance as low as 86 K/W (4-layer PCB, 70 µm copper, collector pad), enabling compact load switching in automotive power management.
For engineers reviewing the PBSS5260PAP datasheet, PBSS5260PAP pinout, PBSS5260PAP application, or PBSS5260PAP equivalent, key selection criteria include verified dual-PNP topology, sub-500 mV VCEsat at full 2 A load, AEC-Q101 compliance, thermal performance under FR4 vs. 4-layer PCB mounting, and direct replacement suitability against PBSS4260PANP (NPN/PNP complement) and PBSS5240PAP (lower-voltage variant).
Technical Context
This device integrates two matched PNP transistors in a single leadless DFN2020-6 package with shared thermal path. Each transistor supports −60 V blocking, −2 A continuous collector current, and operates with base-emitter saturation voltage down to −1.2 V at −2 A/−200 mA drive.
Its BISS (Breakthrough In Small Signal) architecture achieves 250 mΩ RCEsat at −1 A/−100 mA while maintaining 50–75 hFE at −2 A - a combination uncommon in standard small-signal PNP pairs - enabling efficient DC load switching without external heat sinking in space-constrained layouts.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | −60 V: Maximum safe collector-emitter voltage with base open; enables use in 48 V automotive subsystems and industrial 24–48 V rails. |
| IC | −2 A: Continuous collector current per transistor; supports driving motors, fans, or battery isolation switches without derating at 25 °C ambient. |
| VCEsat | −365 to −500 mV at −2 A/−200 mA: Low saturation voltage reduces conduction loss to ≤1 W per transistor, minimizing self-heating in high-duty-cycle loads. |
| RCEsat | 250 mΩ at −1 A/−100 mA: Enables precise current-sense resistor placement or low-loss switching in current-regulated paths. |
| hFE | 50–75 at −2 A: Sustains high current gain even near maximum rating, reducing required base drive current and simplifying driver stage design. |
| Tj max | 150 °C: Junction temperature limit compatible with under-hood automotive environments and sealed industrial enclosures. |
| AEC-Q101 | Qualified: Meets stress-test requirements for discrete semiconductors in automotive applications including temperature cycling, HTRB, and ESD. |
Pinout & Package
Package: DFN2020-6 (SOT1118), 2.0 × 2.0 × 0.65 mm, thermally enhanced ultra-thin SMD plastic package with exposed thermal pad (pin 6 and pin 7 both connect to collector of TR1; pin 3 and pin 8 both connect to collector of TR2 - per datasheet pinning diagram and simplified outline).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Emitter of TR1 | Primary current return path for first PNP transistor; connects directly to low-side ground reference in high-side switch configurations. |
| 2 | Base of TR1 | Control input for TR1; requires −100 mA typical drive for full −1 A conduction, enabling direct MCU GPIO or logic-level driver interface. |
| 3 | Collector of TR2 | Power output node for second PNP; electrically tied to pin 8 per datasheet; used for dual-switch or complementary-stage outputs. |
| 4 | Emitter of TR2 | Independent emitter terminal for TR2; allows separate current sensing or independent load referencing per transistor. |
| 5 | Base of TR2 | Independent control input for TR2; supports asynchronous or phase-shifted switching of dual loads. |
| 6 & 7 | Collector of TR1 | Dual-pin collector connection for TR1; improves current handling and thermal spreading to PCB copper; must be soldered to thermal pad for rated power dissipation. |
| 8 | Collector of TR2 | Second collector node for TR2; tied internally to pin 3; provides redundancy and lower inductance path for high-frequency switching. |
Key Features
| Feature | Design Value |
|---|---|
| Low VCEsat architecture | Delivers −365 mV typical VCEsat at −2 A, cutting conduction loss by >40% versus standard PNP transistors in same package. |
| Dual PNP integration | Two matched PNP transistors share thermal mass and footprint, reducing board area by ~40% vs. discrete dual-transistor solutions. |
| AEC-Q101 qualification | Validated for automotive under-hood operation including −40 to +125 °C ambient, vibration, and humidity exposure per AEC test plan. |
| Thermal resistance optimization | As low as 86 K/W junction-to-ambient on 4-layer PCB with 1 cm² collector pad - enables 1.45 W dissipation without forced air cooling. |
| High hFE at high current | Maintains hFE ≥50 at −2 A, allowing <200 mA base drive to fully saturate both transistors - compatible with 3.3 V/5 V logic drivers. |
Applications
| Automotive Load Switching | Battery Protection Circuit |
|---|---|
Use Scenario: Controlling 12 V/24 V accessory loads (e.g., HVAC actuators, lighting modules) in vehicle body control units. IC Role / Device Role / Timing Role: Dual PNP high-side switch providing reverse-polarity protection and load disconnect with fast turn-off (<270 ns). Use Value: −60 V rating withstands load-dump transients; 250 mΩ RCEsat limits voltage drop to <500 mV at 2 A, preserving system efficiency and reducing thermal margin requirements. | Use Scenario: Isolating lithium-ion battery packs during overcurrent or thermal fault conditions in portable medical devices and power tools. IC Role / Device Role / Timing Role: Bidirectional current-blocking element in series with battery positive rail, controlled by protection IC's enable signal. Use Value: AEC-Q101 qualification ensures reliability under repeated fault cycling; −2 A IC supports up to 2000 mAh cells with 1C discharge; low VCEsat avoids unnecessary battery voltage sag during normal operation. |
| USB-C Power Delivery Switch | Industrial Motor Driver Stage |
Use Scenario: Enabling/disabling VBUS power path in USB-C PD sink applications requiring programmable 5–20 V output with 3 A capability. IC Role / Device Role / Timing Role: High-side pass transistor controlled by PD controller to gate power delivery based on contract negotiation. Use Value: −60 V VCEO accommodates 20 V PD profiles plus safety margin; dual-transistor layout allows redundant current paths or split-current operation for improved reliability. | Use Scenario: Driving small brushed DC motors (e.g., valve actuators, conveyor belts) in PLC I/O modules operating from 24 V DC rails. IC Role / Device Role / Timing Role: Low-loss switching element in H-bridge half-bridge or single-ended configuration, paired with N-channel MOSFETs or complementary PNPs. Use Value: 2 A continuous rating handles peak motor stall currents; 50–75 hFE at full load eases base drive design; DFN2020-6 footprint fits dense industrial PCB layouts with minimal thermal relief. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-PNP switching applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| PBSS4260PANP | NPN/PNP complementary pair in same DFN2020-6 package; VCEO = 60 V, IC = 2 A, VCEsat = 140–200 mV (NPN) / 110–155 mV (PNP) | Enables push-pull or totem-pole output stages; not suitable for dual high-side switching where both devices must be PNP. | Select when complementary drive (e.g., level-shifting, bidirectional current control) is required instead of dual identical PNP switches. |
| PBSS5240PAP | Same dual-PNP topology but rated for −40 V VCEO and −3 A IC; VCEsat = −220 to −310 mV at −2 A | Optimized for 24 V industrial systems with higher current demand; lower voltage rating excludes 48 V automotive use. | Choose for cost-sensitive 24 V applications needing >2 A per channel and reduced VCEsat, provided −40 V blocking suffices. |
Compared with PBSS4260PANP, PBSS5260PAP provides matched PNP behavior essential for redundant or parallel high-side switching, while PBSS5240PAP trades voltage headroom for higher current and lower saturation voltage - making PBSS5260PAP the only option meeting −60 V, dual-PNP, and AEC-Q101 requirements simultaneously.
Availability
PBSS5260PAP is available at Aetrix Electronics and suitable for automotive body electronics, battery management systems, and industrial motor control requiring stable component supply, long-term lifecycle support, and AEC-Q101-compliant sourcing.
Supply support for PBSS5260PAP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance, reliable discrete and logic devices for automotive, industrial, and consumer markets.
PBSS5260PAP belongs to Nexperia's BISS transistor product line, engineered specifically for high-efficiency, space-constrained DC switching applications where low VCEsat, high current gain, and automotive qualification are mandatory.
FAQ
What is the maximum allowable base current for continuous operation?
The absolute maximum DC base current (IB) is −0.3 A per transistor, as specified in Table 5 (Limiting Values). For reliable long-term operation, Nexperia recommends limiting continuous IB to ≤−100 mA per transistor - sufficient to achieve full saturation at −2 A collector current while maintaining thermal stability and avoiding beta degradation.
Can PBSS5260PAP be used in parallel configurations for higher current handling?
Yes - the matched PNP pair and symmetric thermal design support paralleling multiple PBSS5260PAP units. However, external emitter resistors (≤1 Ω) are required per transistor to ensure current sharing; thermal coupling between devices must be minimized via separate thermal pads or staggered placement to avoid thermal runaway.
Is the DFN2020-6 package lead-free and RoHS compliant?
Yes - PBSS5260PAP is manufactured in a lead-free, RoHS-compliant DFN2020-6 (SOT1118) package per Nexperia's product compliance documentation. The terminal finish is matte tin, and the device meets JEDEC J-STD-020 moisture sensitivity level 1 (MSL1) for unlimited floor life at ≤30 °C/85% RH.
How does thermal resistance change when using a 4-layer PCB versus FR4?
On a 4-layer PCB with 70 µm copper and 1 cm² collector pad, Rth(j-a) drops to 63 K/W (per Table 6), versus 278 K/W on single-sided FR4 with 35 µm copper and standard footprint. This 4.4× improvement enables 2.3× higher continuous power dissipation (2.0 W vs. 0.87 W) without exceeding Tj = 150 °C at 25 °C ambient.
PBSS5260PAP,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- 6-UFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 2 PNP (Dual)
- Current - Collector (Ic) (Max):
- 2A
- Voltage - Collector Emitter Breakdown (Max):
- 60V
- Vce Saturation (Max) @ Ib, Ic:
- 500mV @ 200mA, 2A
- Current - Collector Cutoff (Max):
- 100nA (ICBO)
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 110 @ 1A, 2V
- Power - Max:
- 510mW
- Frequency - Transition:
- 100MHz
- Operating Temperature:
- 150°C (TJ)
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-HUSON (2x2)
PBSS5260PAP,115 FAQ
1.How can I place an order for PBSS5260PAP,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PBSS5260PAP,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PBSS5260PAP,115 reliable?
The price and inventory of PBSS5260PAP,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PBSS5260PAP,115 is usually 5 days.
3.What payment methods are accepted for PBSS5260PAP,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PBSS5260PAP,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PBSS5260PAP,115?
PBSS5260PAP,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PBSS5260PAP,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PBSS5260PAP,115?
For technical support, including PBSS5260PAP,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PBSS5260PAP,115 requirements.
6.How does Aetrix verify that PBSS5260PAP,115 is sourced from the original manufacturer or authorized distributors?
All PBSS5260PAP,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PBSS5260PAP,115 meets industry standards.
7.What is the process for return or replacement of PBSS5260PAP,115?
All PBSS5260PAP,115 units undergo pre-shipment inspection (PSI). If there is an issue with PBSS5260PAP,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PBSS5260PAP,115 part is unused and in its original packaging.
Return procedure for PBSS5260PAP,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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