Nexperia USA Inc. PEMT1,115

Overview

PEMT1 from Nexperia is a PNP/PNP general-purpose double transistor in a SOT666 surface-mount package, featuring dual independent transistors with V_CEO = −40 V, I_C = −100 mA per transistor, h_FE = 120 (at V_CE = −6 V, I_C = −1 mA), and total P_tot = 300 mW. It replaces two discrete SC-75/SC-89 transistors on the same PCB area for compact switching and amplification in space-constrained consumer and industrial control circuits.

For engineers reviewing the PEMT1 datasheet, PEMT1 pinout, PEMT1 application, or PEMT1 equivalent, key selection criteria include verified dual-PNP topology, SOT666 footprint compatibility, guaranteed h_FE ≥ 120 at low bias, −40 V V_CEO rating, and thermal resistance of 416 K/W on FR4 PCB - all critical for reliable low-power analog and digital switching designs.

Technical Context

The PEMT1 integrates two electrically isolated PNP bipolar junction transistors sharing a single ultra-small SOT666 package (1.6 × 1.2 × 0.55 mm). Each transistor operates independently with open-base V_CEO = −40 V and absolute maximum I_C = −100 mA, supporting DC switching and small-signal amplification without cross-coupling.

Its design targets high-density PCB layouts: straight leads enable self-alignment during reflow soldering, and the 0.5 mm pitch allows placement in tight spaces where dual SC-75 devices would require >2× board area. Thermal performance is specified for FR4 PCBs with single-sided copper, limiting continuous operation to T_j ≤ 150 °C.

Key Specifications

Pinout & Package

SOT666 is a 6-lead ultra-thin surface-mount plastic package measuring 1.6 mm × 1.2 mm × 0.55 mm with 0.5 mm lead pitch. Its flat, straight leads support precise reflow alignment and high-density placement.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-PNP transistor applications.

Compared with PEMX1 (NPN/NPN) and BC846BPDW1T3G (NPN/NPN in SOT-363), PEMT1 uniquely provides dual PNP switching in the smallest industry-standard footprint, enabling high-side control and inverted logic interfaces without external level shifters or layout compromises.

Availability

PEMT1 is available at Aetrix Electronics and suitable for LED driver circuits, level-shifting interfaces, push-pull output stages, and low-power alarm latches requiring stable component supply and consistent parametric performance across production batches.

Supply support for PEMT1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert specializing in high-volume, high-reliability discrete and logic devices, with leadership in efficiency, miniaturization, and thermal performance for consumer, industrial, and communications markets.

The PEMT1 belongs to Nexperia's general-purpose bipolar transistor family, designed specifically to reduce PCB area and assembly cost in space-constrained applications while maintaining robust DC gain and switching characteristics.

FAQ

What is the maximum allowable junction temperature for PEMT1?

The absolute maximum junction temperature (T_j) for PEMT1 is 150 °C, as defined in the Absolute Maximum Ratings table. Operation above this temperature risks permanent degradation of h_FE and increased leakage currents. Derating is required above 25 °C ambient, with full power dissipation (300 mW) permitted only when thermal resistance to ambient remains ≤416 K/W under specified FR4 mounting conditions.

Can PEMT1 be used in automotive applications?

No - PEMT1 is explicitly marked as non-automotive qualified in its datasheet revision history and legal disclaimers. It has not undergone AEC-Q101 qualification testing, lacks automotive-grade reliability reporting, and is not warranted for use in safety-critical or life-support systems. Automotive designs must select Nexperia's designated AEC-Q101 qualified dual transistors instead.

How does the SOT666 package affect reflow soldering yield?

The SOT666 package uses straight, coplanar leads with 0.5 mm pitch and defined solder land dimensions (2.75 × 2.45 mm footprint), enabling self-alignment during reflow due to surface tension forces. Nexperia specifies reflow soldering as the only recommended method, with peak temperatures limited to 260 °C for ≤10 seconds. This geometry reduces bridging and tombstoning compared to gull-wing packages, improving first-pass yield in fine-pitch SMT lines.

Is there a pin-compatible PNP/NPN variant of PEMT1?

No - Nexperia does not offer a PNP/NPN mixed-polarity variant in the SOT666 package. The PEMT1 is strictly PNP/PNP; its complement PEMX1 is NPN/NPN. For mixed-polarity requirements, designers must use discrete devices or alternate packages such as SOT-363 (e.g., BC847BDW1T3G + BC857BDW1T3G), which increases board area and component count but provides true complementary pairing.