Nexperia USA Inc. PESD5V0L2UMB-QYL
- Part No.:
- PESD5V0L2UMB-QYL
- Manufacturer:
- Nexperia USA Inc.
- Category:
- TVS Diodes
- Package:
- 3-XFDFN
- Datasheet:
-
PESD5V0L2UMB-QYL.pdf
- Description:
- PESD5V0L2UMB-Q/SOT883B/XQFN3
- Quantity:
- Payment:

- Shipping:

Inventory:2,714
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PESD5V0L2UMB-Q from Nexperia is a low-capacitance unidirectional double ESD protection array in SOT883B (DFN1006B-3) package, designed to protect two signal lines against IEC 61000-4-2 level 4 ESD (±15 kV contact) and IEC 61000-4-5 surge (2.5 A, 8/20 µs). Key specs include 5 V reverse standoff voltage, 16 pF typical diode capacitance, 10 V clamping voltage at 1 A, 5 nA leakage, and AEC-Q101 qualification for automotive use.
For engineers reviewing the PESD5V0L2UMB-Q datasheet, PESD5V0L2UMB-Q pinout, PESD5V0L2UMB-Q application, or PESD5V0L2UMB-Q equivalent, this device is selected for high-speed data line protection where low capacitance, tight clamping, and automotive-grade reliability are critical - especially in USB, SIM card, and audio interface circuits with strict signal integrity requirements.
Technical Context
This device implements a common-anode dual-diode architecture: pins 1 and 2 serve as cathodes for two independent unidirectional ESD clamps, while pin 3 is the shared anode tied to ground. It operates in avalanche breakdown mode above 6.46 V (typical VBR) and delivers sub-10 V clamping at 1 A pulse current.
Its ultra-small DFN1006B-3 (1.0 × 0.6 × 0.37 mm) footprint enables placement within 2 mm of I/O connectors, minimizing transient loop inductance. The 0.35 mm pitch and leadless construction support fine-pitch PCB routing and reflow compatibility per JEDEC J-STD-020.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Reverse Standoff Voltage (VRWM) | 5 V - Maximum continuous DC voltage the diodes block without leakage increase; sets upper limit for protected signal swing. |
| Diode Capacitance (Cd) | 16 pF (typ.) at 1 MHz, 0 V - Low enough to avoid signal degradation on USB 2.0 or audio differential pairs. |
| Clamping Voltage (VCL) | 10 V at IPP = 1 A (8/20 µs) - Limits transient voltage seen by downstream ICs to safe levels during ESD events. |
| Peak Pulse Current (IPPM) | 2.5 A (8/20 µs) - Withstands IEC 61000-4-5 surge pulses without failure or parameter shift. |
| ESD Rating | ±15 kV contact (IEC 61000-4-2 level 4) - Meets automotive and industrial immunity standards for user-accessible ports. |
| Leakage Current (IRM) | 5 nA at VRWM = 5 V - Negligible loading on high-impedance sensor or bias networks. |
| Breakdown Voltage (VBR) | 6.8 V (typ.) at IR = 1 mA - Ensures reliable turn-on before protected ICs reach absolute maximum ratings. |
Pinout & Package
Package: DFN1006B-3 (SOT883B), leadless ultra-small plastic package; dimensions 1.0 mm × 0.6 mm × 0.37 mm; 3 solder lands; 0.35 mm pitch; thermal pad not present.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Cathode (Diode 1) | Connects to first signal line requiring unidirectional ESD clamp to ground. |
| 2 | Cathode (Diode 2) | Connects to second independent signal line; shares common anode (pin 3) with diode 1. |
| 3 | Common Anode | Must be connected directly to low-inductance system ground plane to ensure effective clamping and minimal voltage overshoot. |
Key Features
| Feature | Design Value |
|---|---|
| Low signal-line capacitance | 16 pF typ. - Preserves signal rise/fall times on high-speed interfaces like USB 2.0 and MIPI D-PHY. |
| Tight clamping performance | 10 V at 1 A pulse - Keeps protected ICs below 12 V absolute max rating thresholds during transients. |
| AEC-Q101 qualified | Qualified to automotive stress test standard - supports deployment in infotainment, telematics, and ADAS ECUs without additional qualification effort. |
| Ultra-low leakage | 5 nA at 5 V - Prevents DC offset or battery drain in always-on portable electronics and SIM card detection circuits. |
| Small-footprint SMD package | SOT883B (1.0 × 0.6 mm) - Enables placement adjacent to micro-B USB or nano-SIM connectors without board area penalty. |
Applications
| USB 2.0 Data Lines | SIM Card Interface |
|---|---|
Use Scenario: Protection of D+ and D− lines in smartphone or tablet USB ports exposed to repeated plug/unplug and human-hand ESD. IC Role / Device Role / Timing Role: Unidirectional dual-clamp ESD suppressor placed between connector and USB transceiver IC. Use Value: 16 pF capacitance avoids signal integrity loss at 480 Mbps; ±15 kV ESD rating exceeds IEC 61000-4-2 requirement for handheld devices. | Use Scenario: Guarding SIM VCC, I/O, and CLK lines against ESD during hot-swap insertion in mobile handsets and wearables. IC Role / Device Role / Timing Role: Dual-line transient suppressor with common ground return, minimizing PCB trace count. Use Value: 5 nA leakage prevents false SIM detect signals; 5 V VRWM matches standard SIM supply rails. |
| Automotive Infotainment Audio | Portable Headphone Jack |
Use Scenario: Protecting analog audio differential pairs (e.g., AUX-IN, headphone output) in car radio head units subject to service technician ESD. IC Role / Device Role / Timing Role: Low-capacitance bidirectional-equivalent protection via common-anode configuration across both signal legs. Use Value: AEC-Q101 qualification ensures operation across −40 °C to +125 °C ambient; 10 V clamping prevents op-amp input damage. | Use Scenario: Shielding left/right audio channels and microphone input in compact wireless earbuds and TWS charging cases. IC Role / Device Role / Timing Role: Space-constrained dual-line ESD guard for 3.5 mm TRRS jack connections. Use Value: SOT883B footprint fits within 1.2 mm² PCB area; 0.37 mm height allows stacking under thin metal shields. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-line unidirectional ESD protection applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ESD5V3U2UM,215 (Nexperia) | VRWM = 5.3 V; Cd = 12 pF (typ.); VCL = 9.5 V @ 1 A | Lower capacitance and clamping, but no AEC-Q101 qualification | Select for non-automotive consumer audio where tighter signal fidelity is prioritized over automotive compliance. |
| TPD2E001DRYR (TI) | VRWM = 5 V; Cd = 11 pF (typ.); VCL = 12 V @ 1 A; SOT-5X3 package (1.6 × 1.6 mm) | Larger footprint; higher clamping; not AEC-Q101 qualified | Choose when board space permits larger package and lower capacitance is critical for >1 Gbps interfaces. |
Compared with ESD5V3U2UM and TPD2E001DRYR, PESD5V0L2UMB-Q uniquely combines AEC-Q101 qualification, 16 pF capacitance, and 1.0 × 0.6 mm footprint - making it the only option validated for space-constrained automotive signal lines requiring production-grade reliability.
Availability
PESD5V0L2UMB-Q is available at Aetrix Electronics and suitable for automotive infotainment systems, portable USB peripherals, and SIM card modules requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for PESD5V0L2UMB-Q includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, with leadership in ESD protection, MOSFETs, and bipolar transistors.
This part belongs to Nexperia's Automotive-Qualified ESD Protection portfolio, engineered specifically for robust transient suppression in safety-critical and space-constrained automotive signal paths.
FAQ
What is the maximum operating temperature for PESD5V0L2UMB-Q?
The device supports junction temperatures up to 150 °C and ambient operating temperatures from −55 °C to +150 °C, verified per AEC-Q101 thermal cycling and high-temperature operating life tests. Its SOT883B package enables direct thermal coupling to PCB copper, supporting sustained operation in engine bay or power amplifier proximity.
Can PESD5V0L2UMB-Q protect bidirectional signal lines?
Yes - though unidirectional in structure, its common-anode dual-cathode configuration allows symmetric clamping of positive and negative transients on each protected line relative to ground. Application note AN11122 confirms use on bidirectional UART, I²C, and audio lines when grounded anode is routed to low-impedance reference.
Is the SOT883B package compatible with standard reflow profiles?
Yes - the device complies with JEDEC J-STD-020 moisture sensitivity level 1 and supports peak reflow temperatures up to 260 °C. Recommended footprint (Fig. 9 in datasheet) uses 0.3 mm wide solder lands and 0.4 mm spacing to prevent bridging during Type 3 solder paste printing and convection reflow.
How does PESD5V0L2UMB-Q differ from single-line ESD diodes like PESD5V0U1BB?
PESD5V0L2UMB-Q integrates two matched ESD clamps sharing one ground terminal, reducing PCB area by ~40% versus two discrete single-line devices. Its matched VBR (6.46–7.14 V) and Cd ensure balanced protection on differential pairs, unlike cascaded singles which risk timing skew and layout asymmetry.
PESD5V0L2UMB-QYL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Package/Case:
- 3-XFDFN
- Series:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 2
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 5V (Max)
- Voltage - Breakdown (Min):
- 6.46V
- Voltage - Clamping (Max) @ Ipp:
- 15V
- Current - Peak Pulse (10/1000µs):
- 2.5A (8/20µs)
- Power - Peak Pulse:
- -
- Power Line Protection:
- No
- Applications:
- Telecom
- Capacitance @ Frequency:
- 16pF @ 1MHz
- Operating Temperature:
- -55°C ~ 150°C (TA)
- Grade:
- Automotive
- Qualification:
- AEC-Q101
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- DFN1006B-3
PESD5V0L2UMB-QYL FAQ
1.How can I place an order for PESD5V0L2UMB-QYL through Aetrix?
Please submit a Request for Quotation (RFQ) for PESD5V0L2UMB-QYL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PESD5V0L2UMB-QYL reliable?
The price and inventory of PESD5V0L2UMB-QYL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PESD5V0L2UMB-QYL is usually 5 days.
3.What payment methods are accepted for PESD5V0L2UMB-QYL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PESD5V0L2UMB-QYL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PESD5V0L2UMB-QYL?
PESD5V0L2UMB-QYL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PESD5V0L2UMB-QYL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PESD5V0L2UMB-QYL?
For technical support, including PESD5V0L2UMB-QYL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PESD5V0L2UMB-QYL requirements.
6.How does Aetrix verify that PESD5V0L2UMB-QYL is sourced from the original manufacturer or authorized distributors?
All PESD5V0L2UMB-QYL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PESD5V0L2UMB-QYL meets industry standards.
7.What is the process for return or replacement of PESD5V0L2UMB-QYL?
All PESD5V0L2UMB-QYL units undergo pre-shipment inspection (PSI). If there is an issue with PESD5V0L2UMB-QYL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PESD5V0L2UMB-QYL part is unused and in its original packaging.
Return procedure for PESD5V0L2UMB-QYL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PESD5V0L2UMB-QYL Tags

-
ESD9B5.0ST5G
onsemi

-
DESD3V3E1BL-7B
Diodes Incorporated

-
ESD5Z3.3T1G
onsemi

-
D5V0H1B2LP-7B
Diodes Incorporated

-
D5V0P1B2LP-7B
Diodes Incorporated

-
DESD5V0U1BA-7
Diodes Incorporated

-
ESD5Z5.0T1G
onsemi

-
DESD5V0U1BB-7
Diodes Incorporated

-
D12V0L1B2LP-7B
Diodes Incorporated

-
PESD2V0Y1BSFYL
Nexperia USA Inc.

-
DF2S5M4CT,L3F
Toshiba Semiconductor and Storage

-
D5V0L1B2WS-7
Diodes Incorporated
Tech Hub
Comparator circuit design covering voltage thresholds, input limits, open-collector outputs, LM393 wiring, op-amp differences, hysteresis, timing, window detection and practical fault diagnosis.
Schmitt triggers use separate rising and falling thresholds to stabilize slow or noisy signals. This guide covers hysteresis, 74HC14 and 74HCT14 selection, comparator calculations, RC oscillators and p…
Counterfeit components can hide behind convincing markings and passing basic function tests. This engineering reference covers source traceability, external inspection, X-ray, XRF, electrical testing, …
A practical engineering and sourcing framework covering lifecycle verification, lifetime-buy calculations, replacement qualification, supplier checks and counterfeit-risk controls.
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …

