Nexperia USA Inc. PIMZ2,115
- Part No.:
- PIMZ2,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Bipolar Transistor Arrays
- Package:
- SC-74, SOT-457
- Datasheet:
-
PIMZ2,115.pdf
- Description:
- TRANS NPN/PNP 50V 150MA 6-TSOP
- Quantity:
- Payment:

- Shipping:

Inventory:6,778
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Product details
Overview
PIMZ2 from NXP Semiconductors is an NPN/PNP general-purpose double transistor in SOT457 (SC-74) package, integrating complementary bipolar junction transistors on a single die. It supports dual-channel switching and amplification with VCEO = 50 V, IC = 150 mA per transistor, and hFE = 120–560 (TR1 PNP), enabling compact biasing and level-shifting in low-voltage logic interfaces.
For engineers reviewing the PIMZ2 datasheet, PIMZ2 pinout, PIMZ2 application, or PIMZ2 equivalent, this device is selected for space-constrained dual-transistor functions requiring matched thermal behavior, reduced PCB footprint versus discrete pairs, and verified performance at Tj ≤ 150 °C under DC and pulsed conditions.
Technical Context
The PIMZ2 integrates one PNP (TR1) and one NPN (TR2) transistor sharing a common substrate, enabling complementary operation without inter-device thermal drift. TR1 delivers VCEsat = −500 mV at IC = −50 mA / IB = −5 mA; TR2 achieves VCEsat = 250 mV at IC = 50 mA / IB = 5 mA - supporting push-pull output stages and bidirectional signal conditioning.
Its fT of 190 MHz (TR2) and 100 MHz (TR1), combined with Cc ≤ 3 pF (TR2) and ≤ 5 pF (TR1), supports audio-frequency amplification and digital switching up to ~10 MHz. Thermal resistance Rth(j-a) = 417 K/W (per device, SOT457) ensures stable operation under continuous 300 mW total dissipation at Tamb ≤ 25 °C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCEO | 50 V maximum - defines safe DC voltage swing across collector-emitter without breakdown in either transistor. |
| IC (DC) | 150 mA per transistor - sets maximum continuous current handling for switching or linear amplification. |
| hFE | 120–560 (TR1 PNP), typ. 250 - enables predictable base drive sizing for saturation or active-mode biasing. |
| VCEsat | −500 mV (TR1), 250 mV (TR2) - determines on-state power loss and minimum output voltage swing in switch applications. |
| fT | 190 MHz (TR2), 100 MHz (TR1) - indicates usable bandwidth for small-signal amplification and fast switching. |
| Ptot | 300 mW (per device) - defines total thermal budget for both transistors operating simultaneously on FR4 PCB. |
| Rth(j-a) | 417 K/W (per device, SOT457) - quantifies junction-to-ambient thermal path efficiency for thermal design margining. |
Pinout & Package
SOT457 (SC-74) plastic surface-mounted package with 6 leads; 1.1 mm height, 3.1 mm × 2.7 mm footprint; designed for reflow soldering on standard FR4 PCBs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | Collector TR2 (NPN) | Primary high-side current sink node for NPN channel; connects to load or pull-up resistor. |
| 2 | Emiter TR2 (NPN) | Reference node for NPN emitter-follower or common-emitter configuration; ties to ground or bias network. |
| 3 | Collector TR1 (PNP) | Primary high-side current source node for PNP channel; connects to VCC or pull-down load. |
| 4 | Emiter TR1 (PNP) | Reference node for PNP emitter-follower or common-emitter configuration; ties to VCC or bias network. |
| 5 | Base TR1 (PNP) | Control input for PNP transistor; negative-going signal turns TR1 on; requires current-limiting resistor. |
| 6 | Base TR2 (NPN) | Control input for NPN transistor; positive-going signal turns TR2 on; requires current-limiting resistor. |
Key Features
| Feature | Design Value |
|---|---|
| Complementary NPN/PNP pairing | Single-package integration eliminates layout mismatch and improves thermal tracking between switching legs. |
| Matched hFE range (120–560) | Enables consistent gain across both transistors for balanced push-pull driver design without trimming. |
| Low VCEsat (−500 mV / 250 mV) | Reduces conduction loss in switching applications, supporting <100 mW per transistor at rated IC. |
| 625 K/W Rth(j-a) (per transistor) | Allows individual transistor derating when used separately; supports thermal-aware parallel operation. |
| JEDEC SC-74 (SOT457) compliance | Ensures compatibility with standard pick-and-place equipment and IPC-7351B land patterns. |
Applications
| LED Driver Circuit | Level-Shifting Interface |
|---|---|
Use Scenario: Driving dual-color (red/green) LEDs from 3.3 V microcontroller GPIOs with common-anode configuration. IC Role / Device Role / Timing Role: PIMZ2 acts as complementary current sink/source pair controlling LED polarity and brightness via PWM. Use Value: Eliminates need for two separate transistors and matching resistors; reduces BOM count by 40% and board area by 35% vs discrete solution. |
Use Scenario: Translating 1.8 V logic signals to 5 V TTL levels in mixed-voltage sensor interface boards. IC Role / Device Role / Timing Role: TR2 (NPN) pulls down 5 V line; TR1 (PNP) pulls up - forming a bidirectional level shifter without external pull-ups. Use Value: Supports >10 MHz data rates with <2 ns propagation skew between channels due to monolithic thermal coupling. |
| Push-Pull Audio Amplifier | Power Supply Sequencing Control |
Use Scenario: Low-power Class-B headphone amplifier stage in portable audio devices with 3.7 V Li-ion supply. IC Role / Device Role / Timing Role: TR1 and TR2 form complementary emitter-follower output stage delivering ±15 mA into 32 Ω load. Use Value: Achieves THD <0.8% at 1 kHz due to matched hFE and VBE characteristics, minimizing crossover distortion. |
Use Scenario: Enabling/disabling auxiliary rails (e.g., 1.2 V FPGA core, 2.5 V I/O) in strict sequence during system power-up. IC Role / Device Role / Timing Role: TR1 controls enable line of LDO1; TR2 controls enable line of LDO2 - driven by RC-delayed MCU outputs. Use Value: Guarantees 100 µs minimum delay between rail activations using internal transistor timing consistency, avoiding latch-up. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar NPN/PNP dual-transistor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| BC846BPDW1T1G (ON Semiconductor) | SOT363 (SC-88) package; lower Ptot = 300 mW but higher Rth(j-a) = 417 K/W per device; hFE = 200–450. | Smaller footprint but less thermal margin at full IC; suitable only for intermittent duty cycles below 50%. | Select when board area is critical and peak power < 150 mW per transistor; verify thermal relief on FR4. |
| MBT3904DW1T2G (ON Semiconductor) | SOT363 package; NPN/NPN configuration only; no PNP element; VCEO = 40 V; IC = 200 mA. | Cannot replace PIMZ2 in complementary switching; limited to dual-NPN roles like differential pair or current mirror. | Use only where dual-NPN functionality suffices; not a functional substitute for PIMZ2's NPN/PNP pairing. |
Compared with BC846BPDW1T1G and MBT3904DW1T2G, PIMZ2 offers unique NPN/PNP complementarity in SOT457 with superior thermal derating (300 mW total), making it the sole choice for push-pull drivers and level shifters requiring matched turn-on/turn-off behavior.
Availability
PIMZ2 is available at Aetrix Electronics and suitable for LED driver circuits, level-shifting interfaces, push-pull audio amplifiers, and power supply sequencing control requiring stable component supply across industrial and consumer production programs.
Supply support for PIMZ2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT applications.
The PIMZ2 belongs to NXP's general-purpose bipolar transistor product line, engineered to reduce component count and simplify circuit design in cost-sensitive, space-constrained analog and mixed-signal systems.
FAQ
What is the maximum junction temperature rating for PIMZ2?
The absolute maximum junction temperature (Tj) for PIMZ2 is 150 °C, as specified in Table 6 of the NXP datasheet Rev. 06. This rating applies under continuous operation with ambient temperature ≤25 °C and proper PCB copper pour; derating is required above 25 °C ambient per Rth(j-a) = 417 K/W.
Can PIMZ2 be used in linear amplification mode?
Yes - PIMZ2 supports linear operation with verified hFE (120–560), VCEsat, and fT parameters. TR1 (PNP) and TR2 (NPN) each maintain stable gain at VCE = 6 V and IC = 1 mA, enabling Class-A or Class-AB amplifier stages up to 10 MHz with <1% harmonic distortion.
Is there a lead-free and RoHS-compliant version of PIMZ2?
Yes - PIMZ2 is manufactured in lead-free, RoHS-compliant versions per NXP's standard process. The SOT457 package uses matte tin (Sn) termination, and the device meets JEDEC J-STD-020 moisture sensitivity level 1 (MSL1) for unlimited floor life at ≤30 °C/85% RH.
How does PIMZ2's thermal resistance compare between per-transistor and per-device modes?
Per-transistor Rth(j-a) is 625 K/W (SOT457); per-device (both transistors active) is 417 K/W. This 33% improvement reflects shared thermal mass and substrate conduction - meaning simultaneous operation generates less total junction rise than two independent transistors at same power.
PIMZ2,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- -
- Package/Case:
- SC-74, SOT-457
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Transistor Type:
- 1 NPN, 1 PNP
- Current - Collector (Ic) (Max):
- 150mA
- Voltage - Collector Emitter Breakdown (Max):
- 50V
- Vce Saturation (Max) @ Ib, Ic:
- 250mV @ 5mA, 50mA / 500mV @ 5mA, 50mA
- Current - Collector Cutoff (Max):
- 100nA (ICBO)
- DC Current Gain (hFE) (Min) @ Ic, Vce:
- 120 @ 1mA, 6V
- Power - Max:
- 300mW
- Frequency - Transition:
- 100MHz, 190MHz
- Operating Temperature:
- 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSOP
PIMZ2,115 FAQ
1.How can I place an order for PIMZ2,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for PIMZ2,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PIMZ2,115 reliable?
The price and inventory of PIMZ2,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PIMZ2,115 is usually 5 days.
3.What payment methods are accepted for PIMZ2,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PIMZ2,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PIMZ2,115?
PIMZ2,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PIMZ2,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PIMZ2,115?
For technical support, including PIMZ2,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PIMZ2,115 requirements.
6.How does Aetrix verify that PIMZ2,115 is sourced from the original manufacturer or authorized distributors?
All PIMZ2,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PIMZ2,115 meets industry standards.
7.What is the process for return or replacement of PIMZ2,115?
All PIMZ2,115 units undergo pre-shipment inspection (PSI). If there is an issue with PIMZ2,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PIMZ2,115 part is unused and in its original packaging.
Return procedure for PIMZ2,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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