STMicroelectronics PM8834M

Overview

PM8834M from STMicroelectronics is a dual independent low-side MOSFET driver in MSOP-8L-EP package, delivering 4 A source/sink per channel with matched propagation delays (±5 ns), CMOS/TTL-compatible inputs, and operation across 5–18 V supply and –40 °C to 125 °C junction temperature - used to drive high-capacitance power MOSFETs and IGBTs in DC-DC converters and motor controllers.

For engineers reviewing the PM8834M datasheet, PM8834M pinout, PM8834M application, or PM8834M equivalent, key selection considerations include dual enable control, parallel output capability for up to 8 A, anti-cross-conduction protection, thermal pad layout requirements, and gate resistor design guidance for safe operation with low-C_G loads.

Technical Context

The PM8834M integrates two independent lateral DMOS output stages - each with 1 Ω typical R_DS(ON) (source) and 0.7 Ω (sink) - enabling fast switching (t_R/t_F = 10–20 ns @ 2.5 nF) and precise timing symmetry. Its adaptive anti-cross-conduction logic monitors internal N/P-DMOS states to prevent shoot-through during transitions.

Input stage features TTL/CMOS-compatible thresholds (V_IH = 2.2–2.5 V, V_IL = 0.8–1.1 V), internal 10 µA pull-down on PWM pins and 100 kΩ pull-up on ENABLE pins, with UVLO activation at 4.4–4.6 V (rising) and hysteresis ensuring robust startup behavior under varying V_CC slew rates.

Key Specifications

Pinout & Package

PM8834M is housed in an MSOP-8L-EP (exposed pad) package measuring 3.0 mm × 3.0 mm × 0.95 mm, requiring soldered thermal vias to PCB ground plane for thermal integrity. The exposed pad is electrically connected to GND and must be routed as part of the main ground return path.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual low-side gate driver applications.

Compared with IRS2005PBF and LM5113SDX, PM8834M uniquely combines dual independent enable control, hardware anti-cross-conduction, MSOP-8L-EP thermal performance, and seamless 8 A parallel operation - making it optimal for space-constrained, high-reliability motor and SMPS designs where channel independence and thermal headroom are essential.

Availability

PM8834M is available at Aetrix Electronics and suitable for SMPS gate driving, brushless DC motor control, Class-D audio amplifiers, and industrial DC-DC modules requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for PM8834M includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, power, microcontroller, and sensor solutions for automotive, industrial, and consumer markets.

PM8834M belongs to ST's high-performance gate driver product line, engineered specifically for high-frequency, high-current power conversion systems demanding reliability, thermal efficiency, and precise timing control in harsh environments.

FAQ

What is the minimum gate resistor required for safe operation with a 2.5 nF MOSFET gate capacitance?

For a 2.5 nF capacitive load, ST specifies a minimum 2.2 Ω external gate resistor to prevent undervoltage excursions that could violate the safe operating area - especially when V_CC exceeds 15 V. This value is derived from Figure 5 in DS5945 Rev 7 and accounts for peak current limiting and power dissipation sharing between internal R_DS(ON) and the external resistor.

Can PM8834M drive IGBTs as well as MOSFETs?

Yes - the datasheet explicitly states IGBT support in both the Features and Description sections. Its 4 A source/5 A sink capability, low R_DS(ON), and fast switching (10–20 ns rise/fall) make it suitable for driving medium-power IGBTs with gate charges up to ~150 nC, provided gate resistor values are selected to limit peak current and manage Miller plateau crossing.

How does the thermal pad on the MSOP-8L-EP package affect PCB layout?

The exposed thermal pad must be soldered to a dedicated GND copper pour with ≥4 thermal vias (0.3 mm diameter, spaced ≤1 mm apart) connecting to inner-layer or backside ground planes. ST's recommended footprint (Figure 14, DS5945 Rev 7) defines pad dimensions and solder mask opening - omitting this compromises R_THJA and risks thermal shutdown above 105 °C ambient.

Is it safe to tie ENABLE_1 and ENABLE_2 together and drive them from a single MCU GPIO?

Yes - the ENABLE pins are CMOS/TTL-compatible and electrically independent, so tying them together is functionally valid. However, doing so eliminates per-channel fault isolation. For safety-critical applications like motor drives, ST recommends using separate GPIOs to retain independent control - e.g., disabling only the faulty phase during overcurrent detection.