STMicroelectronics PM8834MTR
- Part No.:
- PM8834MTR
- Manufacturer:
- STMicroelectronics
- Category:
- Gate Drivers
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) Exposed Pad
- Datasheet:
-
PM8834MTR.pdf
- Description:
- IC GATE DRVR LOW-SIDE 8MSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,640
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
PM8834MTR from STMicroelectronics is a dual independent low-side MOSFET driver IC with 4 A sink/source capability per channel, designed for high-frequency gate driving of power MOSFETs and IGBTs in switching power stages. It features matched propagation delays (±5 ns), CMOS/TTL-compatible inputs, anti-cross-conduction protection, and operates across 5–18 V supply and –40 °C to 125 °C junction temperature.
For engineers reviewing the PM8834MTR datasheet, PM8834MTR pinout, PM8834MTR application, or PM8834MTR equivalent, key selection criteria include dual-channel enable control, parallel-output capability up to 8 A, thermal performance in MSOP-8EP package, and safe operation under fast-switching, high-capacitive-load conditions.
Technical Context
The PM8834 implements two fully independent low-side drivers using ST's lateral DMOS output stage, with separate ENABLE_1/ENABLE_2 pins enabling per-channel state control prior to PWM signal application. Each channel provides typ. 0.7 Ω sink and 1.0 Ω source RDS(on) at 100 mA and 25 °C, supporting fast switching into capacitive loads up to 14 nF.
Propagation delay matching (±5 ns) enables synchronized parallel operation of OUT_1 and OUT_2 for combined 8 A drive current. The device integrates UVLO (4.6 V turn-on, 3.8 V turn-off), adaptive anti-cross-conduction logic, and internal 10 µA PWM pull-down / 100 kΩ enable pull-up - all validated for industrial motor control and SMPS designs requiring precise timing and robust fault immunity.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Drive Current | 4 A source / 5 A sink per channel into 10 nF load - enables direct driving of high-QG MOSFETs without external buffers. |
| Supply Voltage Range | 5 V to 18 V - supports wide-input DC-DC converters and industrial 12 V/15 V bus systems without level-shifting. |
| Propagation Delay Match | ±5 ns between channels - ensures simultaneous turn-on/turn-off when paralleling outputs for 8 A total drive. |
| Input Thresholds | VIL = 0.8–1.1 V, VIH = 2.2–2.5 V - guarantees reliable interfacing with MCU GPIOs, FPGAs, and PWM controllers. |
| Operating Temperature | –40 °C to +125 °C junction - qualified for under-hood automotive power stages and industrial motor drives. |
| UVLO Threshold | 4.6 V turn-on / 3.8 V turn-off - prevents erratic output behavior during brown-out or soft-start conditions. |
| Rise/Fall Time | 10–20 ns (2.5 nF load) - supports >1 MHz switching frequencies in Class-D amplifiers and resonant converters. |
Pinout & Package
PM8834MTR is supplied in an MSOP-8 package with exposed thermal pad (MSOP 8L-EP), optimized for high-power density PCB layouts and enhanced thermal dissipation (RTHJA = 50 °C/W on 2s2p board).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - ENABLE_1 | Active-high enable for Driver 1 | Must be pulled high to VCC before applying PWM_1; disables OUT_1 and ignores PWM_1 when low. |
| 2 - PWM_1 | CMOS/TTL-compatible input for Driver 1 | Internally pulled down (10 µA); accepts standard logic levels; controls OUT_1 state with matched tD. |
| 3 - GND | Power and signal reference ground | Connects to PCB ground plane; thermal pad must be vias-connected to GND for optimal heat transfer. |
| 4 - PWM_2 | CMOS/TTL-compatible input for Driver 2 | Functionally identical to PWM_1; enables independent control of second channel with matched timing. |
| 5 - OUT_2 | Low-side driver output 2 | Sinks/sources up to 4 A; connects directly to MOSFET/IGBT gate; requires series gate resistor for safe operation. |
| 6 - VCC | Driver supply input | Accepts 5–18 V; bypass with low-ESR MLCC near pin; powers both logic and output stages. |
| 7 - OUT_1 | Low-side driver output 1 | Electrically identical to OUT_2; paralleling OUT_1/OUT_2 yields 8 A drive with matched switching. |
| 8 - ENABLE_2 | Active-high enable for Driver 2 | Independent control of Driver 2; same electrical behavior as ENABLE_1; not matched for timing-critical use. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent enable control | Enables per-channel power gating - critical for phase-shifted or interleaved converter topologies. |
| Parallel output capability | OUT_1 and OUT_2 can be tied together to deliver up to 8 A with matched propagation, eliminating need for external current-combining circuitry. |
| Anti-cross-conduction protection | Hardware-enforced dead-time between P-DMOS and N-DMOS switching - prevents shoot-through even during fast PWM edges. |
| Thermally enhanced MSOP-8EP | Exposed pad reduces RTHJC to 10 °C/W - allows 1.1 W max power dissipation at 70 °C ambient, supporting compact high-current designs. |
| UVLO with hysteresis | Ensures clean startup/shutdown: device remains disabled until VCC ≥ 4.6 V and stays active until VCC ≤ 3.8 V. |
Applications
| SMPS Primary-Side Gate Driving | Brushless DC Motor Phase Control |
|---|---|
|
Use Scenario: Driving high-QG N-channel MOSFETs in synchronous buck or LLC resonant converters operating at 300–1000 kHz. IC Role / Device Role / Timing Role: Dual low-side gate driver delivering matched 4 A peak current per phase with <25 ns propagation delay and ±5 ns channel-to-channel skew. Use Value: Enables tight dead-time control and reduced switching losses via precise gate voltage slew rate management and integrated anti-cross-conduction logic. |
Use Scenario: Controlling three-phase inverter legs in BLDC motor drives where independent enable per half-bridge improves fault handling and commutation sequencing. IC Role / Device Role / Timing Role: Low-side driver for each leg's bottom switch, with ENABLE_1/ENABLE_2 allowing dynamic phase disable during overcurrent or stall conditions. Use Value: Eliminates need for discrete enable logic or microcontroller GPIO expansion, reducing BOM count and improving system-level safety response time. |
| Class-D Audio Amplifier Output Stage | Industrial DC-DC Module Reference Design |
|
Use Scenario: Driving complementary MOSFET pairs in high-fidelity Class-D amplifier output stages requiring sub-20 ns rise/fall times and minimal jitter. IC Role / Device Role / Timing Role: Dual-channel gate driver providing symmetrical sourcing/sinking with matched tR/tF and tD to minimize THD+N and EMI. Use Value: Reduces gate drive asymmetry-induced distortion and enables stable operation up to 1.2 MHz switching without external timing compensation. |
Use Scenario: Embedded power module for programmable logic controllers (PLCs) needing robust, thermally efficient 12 V → 3.3 V/5 V conversion with long-term reliability. IC Role / Device Role / Timing Role: High-current gate driver for synchronous rectification in isolated flyback or forward converters, rated for –40 °C to +105 °C ambient. Use Value: MSOP-8EP package with 50 °C/W RTHJA sustains full 4 A drive capability in confined enclosures without forced airflow or heatsinks. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual low-side gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| IXDN604PI | 4 A peak per channel, but no enable pins; fixed dual-channel operation only; SOIC-8, no exposed pad. | Lacks per-channel enable control and thermal pad - unsuitable for phase-gated or space-constrained designs. | Choose when simplicity and cost outweigh need for independent enable or thermal performance. |
| TPS28225DR | 4.5 A sink/source, but only one enable pin shared across both channels; SOIC-8; no parallel output support. | Cannot disable individual outputs - limits flexibility in multi-phase or fault-isolation architectures. | Select if single-enable operation suffices and TI's 1.5 ns propagation delay matching is prioritized over thermal specs. |
Compared with IXDN604PI and TPS28225DR, PM8834MTR uniquely combines per-channel enable, parallel-output scalability to 8 A, and MSOP-8EP thermal performance - making it optimal for high-reliability, thermally constrained, and functionally flexible power stage designs.
Availability
PM8834MTR is available at Aetrix Electronics and suitable for SMPS primary-side gate driving, brushless DC motor phase control, and Class-D audio amplifier output stages requiring stable component supply, long-lifecycle support, and consistent parametric performance across production batches.
Supply support for PM8834MTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader specializing in power management, analog, and microcontroller technologies, with broad industrial, automotive, and consumer design expertise.
The PM8834 belongs to ST's high-performance gate driver product line, engineered specifically for demanding power conversion applications requiring precision timing, thermal resilience, and functional safety-aware features like anti-cross-conduction and UVLO.
FAQ
Can PM8834MTR drive IGBTs as well as MOSFETs?
Yes - the PM8834MTR's 4 A sink/source capability, low RDS(on), and robust output stage are explicitly qualified for both high-capacitance power MOSFETs and IGBTs. Its 5–18 V VCC range accommodates typical IGBT gate drive voltages, and the anti-cross-conduction logic prevents shoot-through during high-dV/dt transitions common in IGBT-based inverters.
What is the minimum recommended gate resistor for safe operation?
For VCC > 15 V and capacitive loads < 10 nF, ST specifies a minimum 2.2 Ω series gate resistor to prevent undervoltage excursions that could violate the safe operating area. For loads < 4.7 nF, Figure 5 in DS5945 Rev 7 defines higher minimum values - e.g., 4.7 Ω at 2 nF - to ensure stable switching without oscillation or excessive power dissipation.
How does the MSOP-8EP package improve thermal performance over SO8?
The MSOP-8EP's exposed thermal pad reduces junction-to-ambient thermal resistance to 50 °C/W (vs. 85 °C/W for SO8 on the same 2s2p board), enabling 1.1 W max power dissipation at 70 °C ambient - a 69% increase over SO8's 0.65 W. This allows sustained 4 A drive current in compact, convection-cooled layouts without derating.
Is parallel operation of OUT_1 and OUT_2 supported in production designs?
Yes - parallel operation is fully supported and documented in Section 6.3 of DS5945 Rev 7. Matching propagation delays (±5 ns) guarantee simultaneous switching, and the application diagram (Figure 4) shows direct tieing of PWM_1/PWM_2 and OUT_1/OUT_2. ST confirms this configuration delivers up to 8 A continuous drive with verified thermal margin in MSOP-8EP packages.
PM8834MTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width) Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Low-Side
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- IGBT, N-Channel MOSFET
- Voltage - Supply:
- 5V ~ 18V
- Logic Voltage - VIL, VIH:
- 0.8V, 2.5V
- Current - Peak Output (Source, Sink):
- 4A, 4A
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- 45ns, 35ns
- Operating Temperature:
- -40°C ~ 150°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-MSOP-EP
PM8834MTR FAQ
1.How can I place an order for PM8834MTR through Aetrix?
Please submit a Request for Quotation (RFQ) for PM8834MTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for PM8834MTR reliable?
The price and inventory of PM8834MTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PM8834MTR is usually 5 days.
3.What payment methods are accepted for PM8834MTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PM8834MTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for PM8834MTR?
PM8834MTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your PM8834MTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for PM8834MTR?
For technical support, including PM8834MTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PM8834MTR requirements.
6.How does Aetrix verify that PM8834MTR is sourced from the original manufacturer or authorized distributors?
All PM8834MTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PM8834MTR meets industry standards.
7.What is the process for return or replacement of PM8834MTR?
All PM8834MTR units undergo pre-shipment inspection (PSI). If there is an issue with PM8834MTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The PM8834MTR part is unused and in its original packaging.
Return procedure for PM8834MTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
PM8834MTR Tags

-
ZXGD3009E6TA
Diodes Incorporated

-
1EDN7512BXTSA1
Infineon Technologies
-
UCC27517DBVR
Texas Instruments

-
MCP1416T-E/OT
Microchip Technology

-
MCP1402T-E/OT
Microchip Technology

-
MCP1415T-E/OT
Microchip Technology

-
MCP1401T-E/OT
Microchip Technology

-
IX4428NTR
Littelfuse Inc.

-
IRS2005STRPBF
Infineon Technologies

-
IRS2008STRPBF
Infineon Technologies

-
IX4310TTR
Littelfuse Inc.

-
2EDN7524RXTMA1
Infineon Technologies
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

