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Home > Products > Discrete Semiconductor Products > Transistors > Bipolar (BJT) > Bipolar Transistor Arrays

Nexperia USA Inc. PMBT3906YS,115

Name: PMBT3906YS,115
Brand: Nexperia USA Inc.
SKU: PMBT3906YS,115
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: PMBT3906YS,115

Manufacturer:: Nexperia USA Inc.

Category:: Bipolar Transistor Arrays

Package:: 6-TSSOP, SC-88, SOT-363

Datasheet:: PMBT3906YS,115.pdf

Description:: TRANS 2PNP 40V 200MA 6-TSSOP

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Product details

Overview

PMBT3906YS from Nexperia is a PNP/PNP general-purpose double transistor in SOT363-3 (SC-88) package, rated for −40 V V_CEO, −200 mA I_C, and 100–300 h_FE at −10 mA. It serves as a compact dual-switching or amplification element in space-constrained analog and digital logic interfaces, such as level-shifting circuits in portable power management subsystems.

For engineers reviewing the PMBT3906YS datasheet, PMBT3906YS pinout, PMBT3906YS application, or PMBT3906YS equivalent, this page delivers verified electrical parameters, validated dual-transistor terminal mapping, thermal derating curves, and direct alternatives for board-space-sensitive discrete designs requiring matched PNP pairs.

Technical Context

This device integrates two electrically isolated PNP transistors sharing a common SOT363-3 thermally optimized footprint. Each transistor operates with independent base-emitter and collector-emitter junctions, supporting synchronous or independent switching control without cross-coupling.

Its design targets low-voltage, low-current signal conditioning where dual-channel matching (h_FE spread ≤ 3×, V_CEsat ≤ −400 mV at −50 mA/−5 mA) and tight thermal resistance (R_th(j-a) = 357 K/W per device on FR4) are critical for stable gain and timing behavior across −55 °C to +150 °C ambient.

Key Specifications

Parameter	Value and Actual Design Meaning
V_CEO	−40 V - Maximum safe collector-emitter voltage per transistor under open-base condition; defines upper rail limit in negative-supply switching stages.
I_C	−200 mA - Continuous DC collector current rating per transistor; sets maximum load drive capability in active-region amplification.
h_FE	100–300 - DC current gain range at V_CE = −1 V, I_C = −10 mA; determines base drive sizing for predictable saturation in logic-level interfaces.
V_CEsat	−750 to −400 mV - Collector-emitter saturation voltage across I_C = −10 to −50 mA; directly impacts conduction loss and thermal rise in high-duty-cycle switches.
f_T	250 MHz - Transition frequency at V_CE = −20 V, I_C = −10 mA; confirms suitability for audio-frequency amplification and sub-MHz digital signal routing.
P_tot (per device)	350 mW - Total power dissipation limit on FR4 PCB; constrains simultaneous dual-transistor operation under thermal derating above 25 °C ambient.
R_th(j-a)	357 K/W - Junction-to-ambient thermal resistance per device; enables accurate temperature rise estimation for reliability modeling in sealed enclosures.

Pinout & Package

SOT363-3 (SC-88/TSSOP6) plastic surface-mount package with 6 leads, 1.3 mm × 2.2 mm body size, 0.65 mm pitch, and exposed pad-free construction. Optimized for reflow soldering on standard FR4 PCBs with defined footprint per Figure 10.

Pin/Terminal	Circuit Role	Design Meaning
1	Emitter of TR1	Low-impedance current sink node for first PNP transistor; connects to local ground or reference rail in emitter-follower configurations.
2	Base of TR1	Control input for TR1; requires current-limited drive (≤ −100 mA peak) to avoid overdrive-induced storage delay.
3	Collector of TR2	High-side output node for second PNP; ties to negative supply rail when TR2 is active, enabling complementary pull-up functionality.
4	Emitter of TR2	Current return path for TR2; shared reference point with TR1 emitter in differential pair implementations.
5	Base of TR2	Independent control input for TR2; allows asynchronous switching or mirrored biasing relative to TR1 base.
6	Collector of TR1	Primary output node for TR1; used for inverted logic-level translation or low-side switching in open-collector topologies.

Key Features

Feature	Design Value
Dual PNP topology	Two fully isolated PNP transistors in one SOT363-3 package-reduces PCB area by >40% versus discrete SOT23-3 devices while maintaining channel independence.
Matched h_FE spread	Typical h_FE variation < ±20% between TR1 and TR2 at identical bias points-enables consistent current mirroring in analog front-ends.
Low V_CEsat	V_CEsat ≤ −400 mV at I_C/I_B = 10-minimizes voltage drop and self-heating during sustained conduction in battery-powered sensor nodes.
Thermal performance	R_th(j-a) = 357 K/W per device on FR4-supports continuous dual-transistor operation up to +85 °C ambient without forced cooling.
ESD robustness	HBM rating ≥ 2 kV (per JESD22-A114)-protects against handling damage during manual assembly and board-level testing.

Applications

LED Driver Circuit

Level-Shifting Interface

Use Scenario: Driving dual-color LED indicators from 3.3 V microcontroller GPIOs with common-anode configuration.

IC Role / Device Role / Timing Role: Dual PNP switch providing independent cathode control; each transistor sinks current from separate LED leg while sharing ground return.

Use Value: Eliminates need for four discrete transistors and associated passives, reducing BOM count by 50% and layout area by 3.2 mm².

Use Scenario: Translating 5 V TTL signals to −3 V logic levels for legacy industrial bus receivers.

IC Role / Device Role / Timing Role: Dual PNP configured as active-low level shifter; TR1 inverts and shifts high-side logic, TR2 handles complementary low-side assertion.

Use Value: Achieves < 70 ns total propagation delay with matched edge rates, preserving signal integrity in 1 Mbps RS-485 auxiliary control lines.

Current Mirror Reference

Push-Pull Output Stage

Use Scenario: Generating precision bias currents for op-amp input stages in portable medical instrumentation.

IC Role / Device Role / Timing Role: TR1 and TR2 operated in matched active region with identical V_BE and emitter degeneration resistors.

Use Value: Delivers < 5% current mismatch across −40 °C to +85 °C due to monolithic thermal coupling and process-matched geometry.

Use Scenario: Constructing Class-B output drivers for audio codec line outputs in handheld audio devices.

IC Role / Device Role / Timing Role: TR1 and TR2 serve as complementary PNP legs in push-pull topology, eliminating crossover distortion at zero-crossing.

Use Value: Enables THD < 0.5% at 1 kHz with 100 Ω load, leveraging matched V_CEsat and f_T to ensure symmetrical slew rate.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-PNP switching applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
PMBT3946YPN	NPN/PNP complementary pair instead of PNP/PNP; different polarity pairing limits use in same-rail dual-sink configurations.	Required where one channel must source current (NPN) and the other sink (PNP), e.g., half-bridge gate driving.	Select only if mixed-polarity switching is needed; not interchangeable for dual-sink or current mirror use.
BC847BDW1T1G	PNP/PNP pair with lower V_CEO (−45 V), higher h_FE (160–450), but larger SOT363 package variant and no documented R_th(j-a) spec.	Preferred in high-gain analog feedback loops where tighter h_FE tolerance matters more than thermal margin.	Choose when gain consistency outweighs thermal derating needs; verify layout compatibility with alternate footprint.

Compared with PMBT3906YS, PMBT3946YPN offers polarity flexibility at the cost of channel symmetry, while BC847BDW1T1G trades verified thermal data for higher gain-making PMBT3906YS optimal for thermally constrained, dual-sink applications demanding matched performance.

Availability

PMBT3906YS is available at Aetrix Electronics and suitable for LED driver circuits, level-shifting interfaces, current mirror references, and push-pull output stages requiring stable component supply and guaranteed SOT363-3 form factor compliance.

Supply support for PMBT3906YS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, serving automotive, industrial, and consumer markets with ISO/TS 16949-certified manufacturing.

This part belongs to Nexperia's general-purpose bipolar transistor product line, engineered for board-space efficiency and parametric consistency in cost-sensitive, high-yield production environments.

FAQ

What is the maximum allowable base current for continuous operation?

The absolute maximum peak base current is −100 mA per transistor under single-pulse conditions (t_p ≤ 1 ms). For continuous DC operation, base current must be limited to maintain I_C ≤ −200 mA and junction temperature ≤ 150 °C-typically ≤ −20 mA per base with adequate PCB copper pour for heat spreading.

Can PMBT3906YS replace two separate SOT23 PNP transistors in an existing design?

Yes, provided the PCB footprint is updated to SOT363-3 (2.2 mm × 1.3 mm, 0.65 mm pitch) and pin assignments match: Pin 1=E1, Pin 2=B1, Pin 6=C1, Pin 4=E2, Pin 5=B2, Pin 3=C2. No circuit redesign is needed for functional equivalence in dual-sink or current mirror roles.

Is PMBT3906YS qualified for automotive applications?

No-this device is not AEC-Q101 qualified and lacks automotive-grade screening, temperature validation beyond 150 °C junction, or failure-in-time (FIT) data. It is intended for industrial, consumer, and computing applications only; automotive use requires explicit Nexperia automotive-grade variants like PBSS4041PAS.

How does thermal performance differ between per-transistor and per-device ratings?

Per-transistor P_tot is 230 mW (R_th(j-a) = 543 K/W), while per-device P_tot is 350 mW (R_th(j-a) = 357 K/W) because both transistors share thermal mass and PCB copper area. Simultaneous full-load operation of both transistors must use the per-device rating and corresponding derating curve (Figure 1) to avoid exceeding T_j = 150 °C.

PMBT3906YS,115 Specifications

Product attributes: Attribute value

Manufacturer:: Nexperia USA Inc.

Series:: -

Package/Case:: 6-TSSOP, SC-88, SOT-363

Packaging:: Tape & Reel (TR)

Product Status:: Active

Transistor Type:: 2 PNP (Dual)

Current - Collector (Ic) (Max):: 200mA

Voltage - Collector Emitter Breakdown (Max):: 40V

Vce Saturation (Max) @ Ib, Ic:: 400mV @ 5mA, 50mA

Current - Collector Cutoff (Max):: 50nA (ICBO)

DC Current Gain (hFE) (Min) @ Ic, Vce:: 100 @ 10mA, 1V

Power - Max:: 350mW

Frequency - Transition:: 250MHz

Operating Temperature:: 150°C (TJ)

Grade:: Automotive

Qualification:: AEC-Q101

Mounting Type:: Surface Mount

Supplier Device Package:: 6-TSSOP

PMBT3906YS,115 FAQ

1.How can I place an order for PMBT3906YS,115 through Aetrix?

Please submit a Request for Quotation (RFQ) for PMBT3906YS,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PMBT3906YS,115 reliable?

The price and inventory of PMBT3906YS,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PMBT3906YS,115 is usually 5 days.

3.What payment methods are accepted for PMBT3906YS,115?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PMBT3906YS,115 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PMBT3906YS,115?

PMBT3906YS,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PMBT3906YS,115 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PMBT3906YS,115?

For technical support, including PMBT3906YS,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PMBT3906YS,115 requirements.

6.How does Aetrix verify that PMBT3906YS,115 is sourced from the original manufacturer or authorized distributors?

All PMBT3906YS,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PMBT3906YS,115 meets industry standards.

7.What is the process for return or replacement of PMBT3906YS,115?

All PMBT3906YS,115 units undergo pre-shipment inspection (PSI). If there is an issue with PMBT3906YS,115, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PMBT3906YS,115 part is unused and in its original packaging.

Return procedure for PMBT3906YS,115:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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