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Home > Products > Discrete Semiconductor Products > Transistors > Bipolar (BJT) > Bipolar Transistor Arrays

Nexperia USA Inc. PMP4501G,135

Name: PMP4501G,135
Brand: Nexperia USA Inc.
SKU: PMP4501G,135
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: PMP4501G,135

Manufacturer:: Nexperia USA Inc.

Category:: Bipolar Transistor Arrays

Package:: 5-TSSOP, SC-70-5, SOT-353

Datasheet:: PMP4501G,135.pdf

Description:: TRANS 2NPN 45V 100MA 5-TSSOP

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Product details

Overview

PMP4501G,135 from NXP Semiconductors is an NPN/NPN matched double transistor in SOT353 (SC-88A) surface-mount package, designed for precision analog functions requiring tight h_FE and V_BE matching between paired transistors. It delivers h_FE1/h_FE2 ≥ 0.95 ratio, V_BE1−V_BE2 ≤ 2 mV mismatch, 45 V V_CEO, 100 mA I_C, and operates in common-emitter configuration with application-optimized pinout for current mirror and differential amplifier circuits.

For engineers reviewing the PMP4501G,135 datasheet, PMP4501G,135 pinout, PMP4501G,135 application, or PMP4501G,135 equivalent, this device supports high-accuracy biasing, low-drift signal conditioning, and matched-pair circuit topologies where transistor parameter symmetry directly impacts DC stability and AC linearity.

Technical Context

The PMP4501G,135 integrates two fully isolated NPN transistors on a single die within a 5-pin SOT353 package, enabling monolithic matching unattainable with discrete devices. Its internal isolation prevents cross-coupling, while the shared thermal environment ensures correlated drift behavior under temperature variation.

It operates in common-emitter configuration with emitter terminals tied together (Pin 2), supporting direct implementation of current mirrors and emitter-coupled pairs without external wiring compromises. The matched h_FE and V_BE parameters are specified at V_CE = 5 V and I_C = 2 mA - conditions aligned with typical bias point selection in precision analog stages.

Key Specifications

Parameter	Value and Actual Design Meaning
V_CEO	45 V - supports rail-to-rail operation up to ±22.5 V supply in symmetrical designs
I_C	100 mA - enables use in medium-current bias networks and active load applications
h_FE1/h_FE2	≥ 0.95 - guarantees ≤ 5% current gain mismatch, critical for mirror accuracy and CMRR
V_BE1−V_BE2	≤ 2 mV - ensures sub-0.3% base-emitter voltage mismatch at 2 mA, minimizing input offset
f_T	100–250 MHz - supports stable operation into audio and low-MHz signal paths without parasitic oscillation
P_tot (per device)	300 mW - allows dual-transistor operation at elevated ambient temperatures with standard PCB layout

Pinout & Package

SOT353 (SC-88A) is a 5-lead, 1.35 mm × 2.2 mm surface-mount plastic package with gull-wing leads, optimized for reflow soldering and high-density analog layouts.

Pin/Terminal	Circuit Role	Design Meaning
1	Base TR1	Independent control node for first transistor; enables separate biasing in differential pair
2	Emitter TR1, TR2	Common emitter connection - forms shared current node essential for current mirror topology
3	Base TR2	Independent control node for second transistor; allows complementary or mirrored drive
4	Collector TR2	Output terminal for TR2; used as output current source/sink in mirror configurations
5	Collector TR1	Output terminal for TR1; typically connected to reference branch in current mirror design

Key Features

Feature	Design Value
Monolithic h_FE matching	h_FE1/h_FE2 ≥ 0.95 ensures predictable current division in mirror circuits without iterative trimming
Sub-2 mV V_BE mismatch	Enables <10 µV input-referred offset in emitter-coupled amplifiers at 2 mA bias
Common-emitter configuration	Supports direct implementation of Widlar, Wilson, and cascode current mirrors without external interconnect
Application-optimized pinout	Shared emitter (Pin 2) and separated bases (Pins 1 & 3) reduce PCB trace length and parasitic coupling in sensitive analog nodes

Applications

Current Mirror

Differential Amplifier

Use Scenario: Precision bias current generation for op-amp input stages or DAC reference buffers.

IC Role / Device Role / Timing Role: Dual-transistor current mirror acting as active load and reference current source.

Use Value: 0.95 h_FE matching and 2 mV V_BE mismatch limit mirror error to <0.8%, improving PSRR and thermal stability over discrete solutions.

Use Scenario: Input stage of instrumentation amplifier requiring high common-mode rejection.

IC Role / Device Role / Timing Role: Matched emitter-coupled pair providing differential gain with minimized input offset drift.

Use Value: Monolithic matching reduces thermal gradient-induced offset by >5× versus discrete transistors, sustaining CMRR >85 dB over −40 °C to +85 °C.

Active Load

Temperature-Stable Reference

Use Scenario: High-impedance active load in discrete op-amp designs or voltage-controlled current sources.

IC Role / Device Role / Timing Role: TR1 configured as constant-current sink; TR2 as programmable current source via base control.

Use Value: 45 V V_CEO rating allows operation with ±15 V supplies; 100 mA I_C supports >10 mA load currents with <100 mV compliance voltage.

Use Scenario: Two-terminal current reference for sensor excitation or ADC biasing in industrial modules.

IC Role / Device Role / Timing Role: Self-biased current mirror generating temperature-compensated reference current.

Use Value: Matched V_BE and h_FE enable curvature-corrected PTAT/CTAT cancellation, achieving <50 ppm/°C drift over 0–70 °C.

Equivalent & Alternatives

The following parts are listed as comparable options for similar matched-pair transistor applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
PMP4501Y	6-pin SOT363 package; fully isolated emitters (no shared pin); identical electrical specs	Required when independent emitter routing is needed (e.g., cascode or multi-stage mirrors)	Select for designs needing separate emitter control or higher thermal separation between transistors
BCM847DS	Matched NPN pair in SOT363; h_FE ratio ≥ 0.92; V_BE mismatch ≤ 5 mV; lower f_T (120 MHz typ)	Acceptable for DC/low-frequency biasing but less suitable for >100 kHz signal paths	Choose for cost-sensitive applications where 5 mV V_BE mismatch and reduced bandwidth are acceptable

Compared with PMP4501G,135, the PMP4501Y offers greater routing flexibility at the cost of board area, while the BCM847DS trades matching precision and speed for lower unit cost - making PMP4501G,135 optimal for space-constrained, high-accuracy analog designs demanding both tight matching and usable bandwidth.

Availability

PMP4501G,135 is available at Aetrix Electronics and suitable for current mirror circuits, differential amplifiers, active load implementations, and temperature-stable reference generators requiring stable component supply across production lifecycles.

Supply support for PMP4501G,135 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and consumer applications.

The PMP4501G,135 belongs to NXP's precision analog transistor family, engineered specifically for high-fidelity analog signal chains where parameter matching, thermal tracking, and SMD reliability are critical design requirements.

FAQ

What is the maximum operating temperature for PMP4501G,135?

The PMP4501G,135 has a maximum junction temperature (T_j) of 150 °C and an ambient operating range of −65 °C to +150 °C. Its thermal resistance from junction to ambient is 416 K/W (per device), meaning it can dissipate 300 mW at T_amb ≤ 25 °C. Derating is required above 25 °C per the datasheet's thermal curve.

Can PMP4501G,135 be used in a Wilson current mirror configuration?

Yes - the PMP4501G,135 supports Wilson current mirror implementation using its matched NPN pair and shared emitter (Pin 2). TR1 serves as the input transistor; TR2 as the output transistor; and an external third transistor (or resistor) completes the feedback loop. The 0.95 h_FE matching ensures <1% current error at 10 mA output.

Is the emitter connection on Pin 2 internally bonded to both transistors?

Yes - Pin 2 is the common emitter terminal for both transistors, confirmed by the official NXP pinning diagram (SOT353) and application schematics. This internal bond eliminates external wire bonding, reducing parasitic inductance and ensuring identical emitter path impedance for both devices.

Does PMP4501G,135 require special PCB layout considerations?

Yes - due to its matched-pair function, symmetric copper pour around Pins 1 (TR1 base) and 3 (TR2 base) is recommended to minimize thermal gradients. The SOT353 footprint must follow NXP's reflow soldering land pattern (Fig 15), with 0.4 mm pad width and 0.65 mm pitch to ensure coplanarity and avoid tombstoning during assembly.

PMP4501G,135 Specifications

Product attributes: Attribute value

Manufacturer:: Nexperia USA Inc.

Series:: -

Package/Case:: 5-TSSOP, SC-70-5, SOT-353

Packaging:: Tape & Reel (TR)

Product Status:: Obsolete

Transistor Type:: 2 NPN (Dual) Matched Pair, Common Emitter

Current - Collector (Ic) (Max):: 100mA

Voltage - Collector Emitter Breakdown (Max):: 45V

Vce Saturation (Max) @ Ib, Ic:: 400mV @ 5mA, 100mA

Current - Collector Cutoff (Max):: 15nA (ICBO)

DC Current Gain (hFE) (Min) @ Ic, Vce:: 200 @ 2mA, 5V

Power - Max:: 300mW

Frequency - Transition:: 250MHz

Operating Temperature:: 150°C (TJ)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 5-TSSOP

PMP4501G,135 FAQ

1.How can I place an order for PMP4501G,135 through Aetrix?

Please submit a Request for Quotation (RFQ) for PMP4501G,135 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for PMP4501G,135 reliable?

The price and inventory of PMP4501G,135 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for PMP4501G,135 is usually 5 days.

3.What payment methods are accepted for PMP4501G,135?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for PMP4501G,135 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for PMP4501G,135?

PMP4501G,135 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your PMP4501G,135 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for PMP4501G,135?

For technical support, including PMP4501G,135 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your PMP4501G,135 requirements.

6.How does Aetrix verify that PMP4501G,135 is sourced from the original manufacturer or authorized distributors?

All PMP4501G,135 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that PMP4501G,135 meets industry standards.

7.What is the process for return or replacement of PMP4501G,135?

All PMP4501G,135 units undergo pre-shipment inspection (PSI). If there is an issue with PMP4501G,135, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The PMP4501G,135 part is unused and in its original packaging.

Return procedure for PMP4501G,135:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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