Nexperia USA Inc. PUMT1,115

Overview

PUMT1 from Nexperia is a dual PNP general-purpose transistor in a SOT363-3 (SC-88/TSSOP6) package, featuring two independent transistors with V_CEO = −40 V, I_C = −100 mA, h_FE = 120 (at −1 mA), AEC-Q101 qualified, and used for compact board-level switching in automotive body electronics.

For engineers reviewing the PUMT1 datasheet, PUMT1 pinout, PUMT1 application, or PUMT1 equivalent, key selection criteria include dual-PNP integration for space-constrained bias networks, −40 V breakdown rating for 12 V automotive rail compatibility, low 200 mW device power dissipation on FR4, and verified AEC-Q101 stress qualification.

Technical Context

The PUMT1 integrates two electrically isolated PNP bipolar junction transistors sharing a single 6-pin SOT363-3 thermally optimized plastic package. Each transistor supports DC switching and linear amplification with identical absolute maximum ratings: −40 V V_CEO, −100 mA I_C, and −5 V V_EBO.

Its electrical behavior is defined under standard test conditions: h_FE measured at V_CE = −6 V and I_C = −1 mA; V_CE(sat) = −200 mV at I_C = −50 mA / I_B = −5 mA (pulsed); f_T = 100 MHz at V_CE = −12 V / I_C = −2 mA - confirming suitability for low-frequency signal control and stable DC gain applications.

Key Specifications

Pinout & Package

SOT363-3 (TSSOP6) is a 6-pin, surface-mount plastic package with 0.65 mm lead pitch, 2.2 mm × 1.35 mm body size, and exposed pad-less construction optimized for automated reflow assembly on FR4 PCBs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-PNP transistor applications.

Compared with BC847BDW1T1G and MBT3906DW1T1G, the PUMT1 uniquely balances AEC-Q101 compliance, −40 V rating, 120 h_FE minimum, and 200 mV V_CE(sat) - making it optimal for cost-sensitive, space-constrained automotive and industrial switching where guaranteed gain and qualification are mandatory.

Availability

PUMT1 is available at Aetrix Electronics and suitable for automotive door modules, industrial sensor interfaces, consumer appliance power sequencing, and medical diagnostic equipment requiring stable component supply and long-term manufacturability.

Supply support for PUMT1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability discrete and logic devices, headquartered in Nijmegen, Netherlands, with manufacturing in Asia and Europe.

The PUMT1 belongs to Nexperia's AEC-Q101-qualified general-purpose transistor family, designed specifically for space-efficient, thermally robust switching and amplification in automotive body electronics and industrial control systems.

FAQ

Is the PUMT1 suitable for linear amplification applications?

Yes - its h_FE ≥ 120 at −1 mA and V_CE(sat) ≤ −200 mV support stable DC biasing in emitter-follower and common-emitter configurations. The matched transistor pair also enables precision current mirror designs, especially in temperature-stable sensor signal chains where thermal coupling between TR1 and TR2 improves tracking.

What is the maximum allowable ambient temperature for continuous operation?

The PUMT1 supports continuous operation up to +150 °C ambient temperature, as specified in its limiting values table. However, at elevated temperatures, derating is required: total device power dissipation must be reduced linearly above +25 °C ambient, following the 416 K/W R_th(j-a) thermal resistance to maintain T_j ≤ 150 °C.

Does the PUMT1 have integrated ESD protection?

No - the PUMT1 does not include on-chip ESD protection diodes. Its datasheet specifies human-body model (HBM) ESD rating per AEC-Q101 as ≥2 kV, but external TVS or series resistors are recommended for I/O lines exposed to user-accessible connectors or cable harnesses in automotive environments.

Can the two transistors be used in parallel to increase current handling?

No - paralleling TR1 and TR2 is not recommended. They are not matched for current sharing (no guaranteed h_FE tracking beyond typical 120), and thermal coupling may cause uneven current distribution. For >100 mA loads, use a single higher-rated transistor such as the PBSS4041P or consult Nexperia's application note AN11112 on parallel BJT design limitations.