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Renesas RAA2261104GNP#HA0
- Part No.:
- RAA2261104GNP#HA0
- Manufacturer:
- Renesas
- Category:
- Gate Drivers
- Package:
- 16-VQFN Exposed Pad
- Datasheet:
-
RAA2261104GNP#HA0.pdf
- Description:
- IC GATE DRVR LOW-SIDE 16QFN
- Quantity:
- Payment:
- Shipping:
Inventory:3,122
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Product details
Overview
RAA2261104GNP#HA0 from Renesas is a low-side GaN FET driver IC with programmable 0.3/0.75/2.0 A source current, adjustable overcurrent protection (40/80/120 mV thresholds), and integrated 5.8 V regulated gate drive voltage (VDRV). It operates from 6.5 V to 18 V supply, supports both inverting (INB) and non-inverting (IN) logic inputs, and delivers 20 ns propagation delay for high-frequency switching in isolated/non-isolated SMPS topologies.
For engineers reviewing the RAA2261104GNP#HA0 datasheet, RAA2261104GNP#HA0 pinout, RAA2261104GNP#HA0 application, or RAA2261104GNP#HA0 equivalent, key selection considerations include its split-output architecture enabling independent turn-on/turn-off speed control via external resistors, -40°C to +125°C industrial temperature range, 16-lead QFN package, and fault reporting via open-drain FLT pin.
Technical Context
The RAA2261104GNP#HA0 implements a dual-path output stage (OUTH for sourcing, OUTL for sinking) with configurable source current via IGSEL and overcurrent threshold via IDSET. Its internal 5.8 V LDO (VDRV) powers gate drive circuitry and enforces strict VGS compliance for enhancement-mode GaN FETs, backed by UVLO (3.92 V rising, 3.72 V falling) and over-temperature shutdown at 185°C.
Input logic (IN/INB/EN) features TTL/CMOS-compatible thresholds independent of VDD, with 180 kΩ pull-up on INB and 180 kΩ pull-down on IN ensuring defined states during floating conditions. The device supports 0 V or negative (–3 V) turn-off drive via VEEL/VEEH configuration, critical for Miller immunity in high-dV/dt GaN applications.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage (VDD) | 6.5 V to 18 V - Enables direct compatibility with common intermediate bus voltages in industrial and telecom power supplies. |
| Gate Drive Voltage (VDRV) | 5.8 V ±0.3 V - Regulated LDO output prevents GaN FET gate oxide overstress while maintaining sufficient overdrive above VGS(th). |
| Source Current (OUTH) | 0.3 A / 0.75 A / 2.0 A - Programmable via IGSEL connection, allowing optimization of GaN FET turn-on speed and EMI trade-offs. |
| Overcurrent Threshold | 40 mV / 80 mV / 120 mV - Adjustable via IDSET, enabling precise current-limit setting for different shunt resistor values (e.g., 1 mΩ → 40 A trip). |
| Propagation Delay | 20 ns - Ensures tight timing control in >1 MHz switching applications without adding dead-time uncertainty. |
| Operating Temperature | –40°C to +125°C - Validated for use in thermally demanding environments such as server PSUs and industrial motor drives. |
| Input Voltage Range (IN/INB) | 0 V to 18 V - Allows direct interfacing with 3.3 V, 5 V, or 12 V PWM controllers without level-shifting circuitry. |
Pinout & Package
RAA2261104GNP#HA0 is housed in a 16-lead QFN package (4 mm × 4 mm, 0.5 mm pitch) with exposed thermal pad (E-pad) connected to VSS for enhanced thermal dissipation. Pin numbering follows standard top-view orientation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (FLT) | Fault output | Open-drain signal asserting high on OCP, UVLO, or OTP; requires external 10 kΩ pull-up for system-level fault monitoring. |
| 2 (EN) | Enable input | Active-high enable with 90 kΩ internal pull-down; toggling low forces OUTL to VEEL and OUTH to Hi-Z for safe shutdown. |
| 3 (INB) | Inverting PWM input | Edge-triggered, 180 kΩ internal pull-up to VDD; used for active-low enable or inverting gate drive operation. |
| 4 (IN) | Non-inverting PWM input | Edge-triggered, 180 kΩ internal pull-down to VSS; used for active-high enable or standard gate drive operation. |
| 5 (IGSEL) | Source current select | Configures OUTH peak current: VDRV = 0.3 A, VSS = 0.75 A, 1 MΩ to VSS = 2.0 A. |
| 6 (IDSET) | OCP threshold select | Sets ISNSP–ISNSN comparator threshold: VSS = 40 mV, 1 MΩ to VSS = 80 mV, VDRV = 120 mV. |
| 7 (ISNSN), 8 (ISNSP) | Current sense inputs | Differential pair for high-side or low-side shunt sensing; requires low-inductance layout to avoid noise-induced false trips. |
| 9 (VEEL) | Turn-off voltage rail | Connect to 0 V (for 0 V turn-off) or –3 V/–5 V supply (for negative turn-off) to suppress Miller-induced false turn-on. |
| 10 (OUTL) | Low-side gate output | Sinks up to 3.0 A (0 V turn-off) or 1.2 A (–3 V turn-off); must connect directly to GaN FET gate with minimal trace inductance. |
| 11 (OUTH) | High-side gate output | Sources up to 2.0 A; series gate resistor placed here independently controls turn-on dv/dt and EMI. |
| 12 (VDRV) | Internal 5.8 V regulator output | Decoupled with 4.7 µF capacitor to VSS; powers internal logic and serves as gate drive reference. |
| 13 (VEEH) | Logic supply for OUTL | Connect to VDRV for 0 V turn-off or VSS for negative turn-off; defines internal bias for low-side output stage. |
| 14 (VSSP), 15 (VSS) | Power and analog ground | VSSP is power ground; VSS is analog ground; both must be shorted on PCB to minimize ground bounce in high-speed switching. |
| 16 (VDD) | Main supply input | 6.5 V–18 V input decoupled with 10 µF capacitor; powers internal LDO and logic circuits. |
| E-pad | Thermal pad | Internally connected to VSS; must be soldered to large copper pour for θJA = 39°C/W thermal performance. |
Key Features
| Feature | Design Value |
|---|---|
| Split-output architecture | Independent OUTH (source) and OUTL (sink) pins allow discrete gate resistor placement for precise control of turn-on and turn-off dv/dt without diode-based solutions. |
| Programmable source current | Three selectable OUTH drive strengths (0.3/0.75/2.0 A) via IGSEL pin, enabling optimization for different GaN FET gate charges and layout parasitics. |
| Adjustable overcurrent protection | Three OCP thresholds (40/80/120 mV) set by IDSET connection, supporting flexible current-sense resistor selection across 10–100 A load ranges. |
| UVLO with fail-safe state | VDRV UVLO (3.92 V rising) forces OUTH to VEEL via 500 Ω resistor and shorts OUTL to VEEL, guaranteeing GaN FET remains OFF during brown-out conditions. |
| Negative turn-off capability | VEEL/VEEH configuration supports –3 V gate drive, actively pulling GaN FET gate below source to eliminate Miller-induced false turn-on in hard-switching topologies. |
Applications
| Server PSU Primary Side | Industrial Motor Drive Gate Driver |
|---|---|
Use Scenario: High-efficiency 3.3 kW server power supply using GaN FETs in totem-pole PFC and LLC resonant converter stages. IC Role / Device Role / Timing Role: Low-side driver for primary-side GaN switches, delivering 20 ns propagation delay and 2 A source current to achieve >1 MHz switching with minimal dead-time loss. Use Value: Enables >98% efficiency at full load by minimizing gate drive losses and supporting fast, controlled transitions that reduce conduction and switching losses in GaN devices. | Use Scenario: 10 kW variable-frequency drive for HVAC compressors, requiring robust gate driving under high dV/dt and thermal stress. IC Role / Device Role / Timing Role: Isolated low-side driver for half-bridge GaN FETs, leveraging programmable OCP and negative turn-off to prevent shoot-through during transient overload events. Use Value: Prevents destructive shoot-through via 80 mV OCP threshold (with 0.5 mΩ shunt) and –3 V turn-off, improving system reliability in harsh industrial environments. |
| Telecom Rectifier Module | GaN-Based Bidirectional DC-DC Converter |
Use Scenario: 48 V input telecom rectifier with GaN-based synchronous rectification and active clamp forward topology. IC Role / Device Role / Timing Role: Secondary-side synchronous FET driver with 0.75 A source current and 40 mV OCP, operating across –40°C to +125°C ambient. Use Value: Maintains stable gate drive performance over wide temperature range, reducing output ripple and improving dynamic response during load transients. | Use Scenario: 400 V/48 V bidirectional DC-DC converter for energy storage systems, using GaN FETs in dual-active-bridge topology. IC Role / Device Role / Timing Role: Low-side driver for high-side GaN switches in DAB phase-shift control, utilizing IN/INB dual-input flexibility for complementary PWM generation. Use Value: Dual-input support eliminates need for external inverters, simplifying control board design and reducing component count and propagation skew between channels. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar low-side GaN FET driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMG1210RQDR | Fixed 2.5 A source/5 A sink current; no programmable OCP or source current; 5 V VDD min; no negative turn-off capability. | Targeted at lower-cost, fixed-performance GaN drivers where OCP adjustment and –3 V drive are not required. | Select LMG1210RQDR only if design uses fixed 5 V gate drive and does not require field-adjustable OCP or negative turn-off. |
| UCC27611DRCR | Single-output (not split), 10 A peak sink/source; no integrated VDRV; requires external 5–6 V gate supply; no OCP or FLT pin. | Designed for discrete gate supply architectures where external regulation and sensing are implemented separately. | Choose UCC27611DRCR when gate supply and current sensing are already centralized in system-level design and split outputs are unnecessary. |
Compared with LMG1210RQDR and UCC27611DRCR, the RAA2261104GNP#HA0 provides unique integration of programmable source current, adjustable OCP, and negative turn-off-enabling higher system-level efficiency and reliability in thermally constrained, high-density GaN power converters without added external components.
Availability
RAA2261104GNP#HA0 is available at Aetrix Electronics and suitable for server PSUs, industrial motor drives, telecom rectifiers, and bidirectional DC-DC converters requiring stable component supply, extended temperature operation, and GaN-specific gate drive features.
Supply support for RAA2261104GNP#HA0 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Renesas Electronics is a global semiconductor leader delivering trusted embedded design innovation for automotive, industrial, infrastructure, and IoT applications.
The RAA226110 product line is engineered specifically for high-frequency GaN-based power conversion, addressing critical needs including Miller immunity, precise overcurrent detection, and flexible gate drive configuration in next-generation SMPS designs.
FAQ
What is the purpose of the VEEL and VEEH pins on the RAA2261104GNP#HA0?
The VEEL pin sets the gate turn-off voltage level (0 V or –3 V), while VEEH selects the internal logic supply for the OUTL stage. Connecting VEEL to 0 V enables standard 0 V turn-off; connecting it to a negative supply enables active pull-down to suppress Miller-induced false turn-on. VEEH must match VEEL's reference (VDRV for 0 V turn-off, VSS for negative turn-off) to ensure correct output stage biasing in the RAA2261104GNP#HA0.
How does the RAA2261104GNP#HA0 implement overcurrent protection?
The RAA2261104GNP#HA0 monitors differential voltage across ISNSP and ISNSN using an internal comparator. The OCP threshold is set by IDSET connection (40/80/120 mV), and when exceeded, the device immediately shuts down OUTL, forces OUTH to Hi-Z, and asserts FLT high. Response time is 60–105 ns, and recovery requires toggling EN low then high. This protection is fully integrated and requires no external comparators or latch circuits in the RAA2261104GNP#HA0.
Can the RAA2261104GNP#HA0 drive both inverting and non-inverting gate signals?
Yes, the RAA2261104GNP#HA0 supports both configurations via dedicated IN (non-inverting) and INB (inverting) inputs. In non-inverting mode, apply PWM to IN and tie INB to VSS; output follows input. In inverting mode, apply PWM to INB and tie IN to VDD; output is inverted. Both inputs are edge-triggered with internal pull resistors, eliminating need for external biasing in the RAA2261104GNP#HA0.
What is the function of the IGSEL pin on the RAA2261104GNP#HA0?
The IGSEL pin configures the peak source current of the OUTH output: connecting IGSEL to VDRV selects 0.3 A, to VSS selects 0.75 A, and to VSS through a 1 MΩ resistor selects 2.0 A. This allows designers to match gate drive strength to the specific GaN FET's Qg and layout parasitics, optimizing switching speed, EMI, and gate driver power loss in the RAA2261104GNP#HA0.
Does the RAA2261104GNP#HA0 include thermal protection?
Yes, the RAA2261104GNP#HA0 integrates over-temperature protection (OTP) that triggers at 185°C junction temperature. When activated, it disables the output stage (OUTL pulled to VEEL, OUTH to Hi-Z) and asserts FLT high. Hysteresis is 20°C, so recovery occurs at ~165°C. This protection operates independently of VDRV and UVLO, ensuring safe shutdown even during sustained overload or cooling failure in the RAA2261104GNP#HA0.
RAA2261104GNP#HA0 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Renesas
- Series:
- -
- Package/Case:
- 16-VQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- Low-Side
- Channel Type:
- Independent
- Number of Drivers:
- 2
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 6.5V ~ 18V
- Logic Voltage - VIL, VIH:
- 1.6V, 2.3V
- Current - Peak Output (Source, Sink):
- 2A, 1.2A
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- 30ns, 31ns
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-QFN (4x4)
RAA2261104GNP#HA0 FAQ
1.How can I place an order for RAA2261104GNP#HA0 through Aetrix?
Please submit a Request for Quotation (RFQ) for RAA2261104GNP#HA0 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for RAA2261104GNP#HA0 reliable?
The price and inventory of RAA2261104GNP#HA0 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for RAA2261104GNP#HA0 is usually 5 days.
3.What payment methods are accepted for RAA2261104GNP#HA0?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for RAA2261104GNP#HA0 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for RAA2261104GNP#HA0?
RAA2261104GNP#HA0 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your RAA2261104GNP#HA0 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for RAA2261104GNP#HA0?
For technical support, including RAA2261104GNP#HA0 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your RAA2261104GNP#HA0 requirements.
6.How does Aetrix verify that RAA2261104GNP#HA0 is sourced from the original manufacturer or authorized distributors?
All RAA2261104GNP#HA0 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that RAA2261104GNP#HA0 meets industry standards.
7.What is the process for return or replacement of RAA2261104GNP#HA0?
All RAA2261104GNP#HA0 units undergo pre-shipment inspection (PSI). If there is an issue with RAA2261104GNP#HA0, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The RAA2261104GNP#HA0 part is unused and in its original packaging.
Return procedure for RAA2261104GNP#HA0:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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