Vishay General Semiconductor - Diodes Division SAC36-E3/54
- Part No.:
- SAC36-E3/54
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Category:
- TVS Diodes
- Package:
- DO-204AC, DO-15, Axial
- Datasheet:
-
SAC36-E3/54.pdf
- Description:
- TVS DIODE 36VWM 60VC DO204AC
- Quantity:
- Payment:

- Shipping:

Inventory:7,482
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Product details
Overview
SAC36-E3/54 from Vishay General Semiconductor is a unidirectional low-capacitance TRANSZORB® transient voltage suppressor (TVS) diode in DO-15 package, designed for clamping voltage transients on signal and power lines. It features a 36 V working peak inverse voltage (VWM), 40.0 V minimum breakdown voltage (VBR) at 1.0 mA, 60.0 V maximum clamping voltage (VC) at 8.6 A IPPM, 500 W peak pulse power (10/1000 μs), and 175 °C max junction temperature - used to protect MOSFETs, ICs, and sensor signal lines in industrial and telecom equipment.
For engineers reviewing the SAC36-E3/54 datasheet, SAC36-E3/54 pinout, SAC36-E3/54 application, or SAC36-E3/54 equivalent, key selection criteria include clamping voltage margin vs. protected device's absolute maximum rating, unidirectional polarity alignment with DC-biased lines, DO-15 thermal derating above 25 °C, and 500 W surge capability under repetitive 0.01% duty cycle conditions.
Technical Context
The SAC36-E3/54 operates as a unidirectional avalanche diode, triggered when reverse voltage exceeds its 40.0 V (min) breakdown threshold. Its glass-passivated junction ensures stable VBR tolerance and low leakage (<5.0 μA at VWM), while low incremental surge resistance enables effective energy diversion during fast transients.
Designed for 10/1000 μs waveform compliance, it delivers 8.6 A peak pulse current (IPP) with 60.0 V clamping, maintaining <1 ns response time. The DO-15 package supports manual or automated through-hole assembly and meets UL 94 V-0 flammability requirements with matte tin-plated leads compliant to J-STD-002 and JESD 22-B102.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VWM | 36 V - maximum continuous reverse operating voltage before conduction begins; sets upper limit for safe DC bias on protected line |
| VBR (min) | 40.0 V at IT = 1.0 mA - guaranteed avalanche initiation threshold; ensures reliable turn-on before downstream device overvoltage |
| VC (max) | 60.0 V at IPP = 8.6 A - clamped voltage during 10/1000 μs surge; must remain below protected IC's absolute max rating |
| PPPM | 500 W - peak pulse power handling per single 10/1000 μs event; defines transient energy absorption capacity |
| ID (max) | 5.0 μA at VWM - reverse leakage current; low value minimizes standby power loss and signal distortion |
| TJ max | 175 °C - maximum junction temperature; enables operation in high-ambient industrial environments with proper PCB copper area |
| Package | DO-15 (DO-204AC) - standardized through-hole outline with 0.250" lead spacing; supports ≥3.0 W steady-state dissipation on infinite heatsink at TL = 75 °C |
Pinout & Package
DO-15 (DO-204AC) package: axial-leaded, molded epoxy body with cathode band marking; overall length 1.0" (25.4 mm) min, diameter 0.130–0.138" (3.3–3.5 mm); leads are matte tin-plated, solderable per J-STD-002, rated for 275 °C / 10 s dip.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Anode | Forward conduction terminal | Connected to lower-potential side of protected circuit; carries surge current toward ground during clamping |
| Cathode (banded end) | Reverse-biased avalanche terminal | Connected to higher-potential line (e.g., VCC or signal); initiates clamping when voltage exceeds VBR |
Key Features
| Feature | Design Value |
|---|---|
| Glass-passivated chip junction | Ensures stable VBR over temperature and lifetime; eliminates surface degradation risks in humid or contaminated environments |
| 500 W peak pulse power (10/1000 μs) | Handles common lightning-induced surges and inductive switch-off spikes without degradation under 0.01% duty cycle |
| Low incremental surge resistance | Minimizes VC rise under high di/dt events, improving clamping precision for sensitive 3.3 V or 5 V logic interfaces |
| UL 94 V-0 molding compound | Prevents flame propagation in fault conditions, satisfying safety requirements for industrial and telecom enclosures |
| JESD 201 Class 1A whisker resistance | Eliminates tin whisker growth risk in long-life applications such as base station power supplies and factory automation controllers |
Applications
| Industrial Motor Control | Telecom Line Interface |
|---|---|
Use Scenario: Protection of gate drivers and feedback sensors against inductive kickback from 24 V DC solenoids and relay coils. IC Role / Device Role / Timing Role: Unidirectional TVS placed between gate and source of N-channel MOSFETs to clamp negative-going transients. Use Value: 60.0 V clamping ensures MOSFET VGS(abs max) of ±20 V is never exceeded, preventing gate oxide rupture during 500 W surge events. | Use Scenario: Surge suppression on RS-485 differential pairs in outdoor network repeaters exposed to induced lightning currents. IC Role / Device Role / Timing Role: Paired SAC36-E3/54 units (anode-to-anode) across A/B lines to clamp common-mode transients while preserving signal integrity. Use Value: 50 pF junction capacitance minimizes signal edge degradation at 10 Mbps, meeting TIA/EIA-485-A timing budgets. |
| Consumer Power Adapter | Automotive Body Control Module |
Use Scenario: Input-stage protection for AC-DC flyback controllers subjected to EN 61000-4-5 line surge testing. IC Role / Device Role / Timing Role: Mounted across primary-side bulk capacitor to absorb 1 kV/2 Ω combination wave surges. Use Value: 175 °C TJ(max) allows operation adjacent to hot transformers without thermal runaway, supporting compact adapter designs. | Use Scenario: CAN bus node protection in 12 V vehicle subsystems where load dump and jump-start transients exceed 35 V. IC Role / Device Role / Timing Role: Placed between CAN_H and chassis ground to clamp positive transients exceeding VWM = 36 V. Use Value: 40.0 V VBR(min) provides 4 V design margin above 36 V system nominal, ensuring robust turn-on before transceiver damage. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar transient voltage suppression applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SMBJ36A-E3/52 | Same VWM (36 V), but SMB package (surface-mount); 600 W PPPM; 100 pF Cj vs. 50 pF for SAC36-E3/54 | Requires PCB rework for SMT layout; better suited for high-density boards where DO-15 footprint is prohibitive | Select if board space is constrained and thermal management via copper pour is feasible |
| P6KE36A | Same DO-15 package and VWM; 600 W PPPM; higher VC = 64.0 V at 6.5 A; 100 pF Cj | Higher clamping voltage reduces margin for 3.3 V logic; larger junction capacitance limits high-speed data line use | Select only for cost-sensitive, non-high-speed applications where 64.0 V VC is acceptable |
Compared with SMBJ36A-E3/52 and P6KE36A, SAC36-E3/54 offers the lowest junction capacitance (50 pF) in DO-15 format, making it preferred for signal-line protection where bandwidth preservation is critical - especially in RS-485, CAN, or analog sensor interfaces where <100 pF is required.
Availability
SAC36-E3/54 is available at Aetrix Electronics and suitable for industrial motor control, telecom line interface, and consumer power adapter designs requiring stable component supply, RoHS-compliant through-hole TVS protection, and verified 500 W surge capability.
Supply support for SAC36-E3/54 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Vishay General Semiconductor is a global leader in discrete semiconductors, specializing in diodes, rectifiers, and protection devices with emphasis on reliability, ruggedness, and industry-standard qualification.
The SAC series is engineered specifically for robust transient suppression in harsh environments - targeting industrial automation, telecom infrastructure, and automotive subsystems where failure due to ESD or surge is unacceptable.
FAQ
What is the maximum clamping voltage of SAC36-E3/54 under standard test conditions?
The SAC36-E3/54 has a maximum clamping voltage (VC) of 60.0 V when subjected to an 8.6 A peak pulse current (IPP) with a 10/1000 μs waveform at TA = 25 °C. This value is measured per Figure 3 in the official Vishay datasheet (Document Number: 88379) and defines the upper voltage limit imposed on protected circuitry during surge events. Designers must verify that this clamping level remains safely below the absolute maximum ratings of downstream components.
Is SAC36-E3/54 suitable for bidirectional signal line protection?
No - SAC36-E3/54 is a unidirectional TVS diode, intended for DC-biased or single-polarity lines. For bidirectional AC or differential signal protection (e.g., RS-485), two SAC36-E3/54 units must be connected anode-to-anode. Using a single SAC36-E3/54 on an AC-coupled line would allow conduction only in one direction and leave the opposite polarity unprotected.
What is the reverse leakage current specification for SAC36-E3/54 at its working voltage?
At its 36 V working peak inverse voltage (VWM), the SAC36-E3/54 exhibits a maximum reverse leakage current (ID) of 5.0 μA at TA = 25 °C. This low leakage ensures minimal power loss and signal interference in always-on circuits such as sensor bias networks or microcontroller I/O protection paths.
Does SAC36-E3/54 meet RoHS and lead-free soldering requirements?
Yes - the "E3" suffix in SAC36-E3/54 indicates full RoHS compliance and commercial-grade qualification. Its matte tin-plated leads are solderable per J-STD-002 and withstand solder dip up to 275 °C for 10 seconds (JESD 22-B106). The device also passes JESD 201 Class 1A whisker testing, confirming long-term reliability in lead-free assembly processes.
How does the thermal performance of SAC36-E3/54 compare to surface-mount alternatives?
SAC36-E3/54 delivers 3.0 W power dissipation on an infinite heatsink at TL = 75 °C, leveraging the DO-15 package's proven thermal path through axial leads and PCB copper. While SMT equivalents like SMBJ36A offer higher peak power (600 W), SAC36-E3/54 provides superior thermal stability in high-ambient environments due to lower junction-to-lead resistance and compatibility with large thermal relief pads - critical for industrial power supply designs.
SAC36-E3/54 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Vishay General Semiconductor - Diodes Division
- Package/Case:
- DO-204AC, DO-15, Axial
- Series:
- TransZorb®
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Zener
- Unidirectional Channels:
- 1
- Bidirectional Channels:
- -
- Voltage - Reverse Standoff (Typ):
- 36V
- Voltage - Breakdown (Min):
- 40V
- Voltage - Clamping (Max) @ Ipp:
- 60V
- Current - Peak Pulse (10/1000µs):
- 8.6A
- Power - Peak Pulse:
- 500W
- Power Line Protection:
- No
- Applications:
- General Purpose
- Capacitance @ Frequency:
- -
- Operating Temperature:
- -55°C ~ 175°C (TJ)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- DO-204AC (DO-15)
SAC36-E3/54 FAQ
1.How can I place an order for SAC36-E3/54 through Aetrix?
Please submit a Request for Quotation (RFQ) for SAC36-E3/54 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SAC36-E3/54 reliable?
The price and inventory of SAC36-E3/54 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SAC36-E3/54 is usually 5 days.
3.What payment methods are accepted for SAC36-E3/54?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SAC36-E3/54 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SAC36-E3/54?
SAC36-E3/54 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SAC36-E3/54 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SAC36-E3/54?
For technical support, including SAC36-E3/54 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SAC36-E3/54 requirements.
6.How does Aetrix verify that SAC36-E3/54 is sourced from the original manufacturer or authorized distributors?
All SAC36-E3/54 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SAC36-E3/54 meets industry standards.
7.What is the process for return or replacement of SAC36-E3/54?
All SAC36-E3/54 units undergo pre-shipment inspection (PSI). If there is an issue with SAC36-E3/54, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SAC36-E3/54 part is unused and in its original packaging.
Return procedure for SAC36-E3/54:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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