Microchip Technology SCH3222-SX

Overview

SCH3222-SX from Microchip Technology is a 3.3V Low Pin Count (LPC) Super I/O controller with 8042 keyboard/mouse controller, four full-function UARTs, two fixed 4-pin serial ports, IrDA 1.0 infrared interface, and 23 GPIOs - all in an 84-ball WFBGA package rated for industrial temperature (-40°C to +85°C). It serves as motherboard glue logic for legacy PC-compatible embedded systems requiring serial expansion, power management, and system monitoring without hardware monitor capability.

For engineers reviewing the SCH3222-SX datasheet, SCH3222-SX pinout, SCH3222-SX application, or SCH3222-SX equivalent, this device is selected for cost-optimized LPC-based designs needing serial port consolidation, PS/2 keyboard/mouse support, ACPI-compliant wake-up events, and programmable clock output at 16 Hz - especially where hardware monitoring (voltage/temp/fan) is not required.

Technical Context

The SCH3222-SX implements a dedicated 8-bit 8042-compatible microcontroller with 2 KB ROM and 256 bytes RAM, supporting asynchronous access to dual data registers and status register. Its LPC interface operates at 19–33 MHz and complies with Intel LPC Specification Rev 1.0, enabling direct connection to modern chipsets while maintaining ISA Plug-and-Play register compatibility.

It integrates four NS16C550A-compatible UARTs with 16-byte FIFOs, supporting baud rates up to 1.5 Mbps and RS485 auto-direction control. Unlike SCH3227/SCH3226/SCH3224, the SCH3222-SX excludes hardware monitoring, parallel port, IDE/PCI reset outputs, and power button/AC fail recovery - confirmed by Table 1-1 and Section 1.3 of DS00002121B.

Key Specifications

Pinout & Package

Package: 84-ball WFBGA (10 mm × 10 mm, 0.8 mm pitch), RoHS-compliant, industrial temperature range (-40°C to +85°C).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar Super I/O applications.

Compared with SCH3222-SX, SCH3224-SX adds hardware monitoring at higher pin count and cost, while IT8786E-S offers broader legacy I/O but requires larger PCB area and lacks IrDA - making SCH3222-SX optimal for compact, serial-centric embedded designs without thermal supervision.

Availability

SCH3222-SX is available at Aetrix Electronics and suitable for industrial thin clients, network appliances, embedded control panels, and low-cost POS terminals requiring stable component supply and long-term lifecycle support.

Supply support for SCH3222-SX includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and connectivity solutions for industrial, automotive, and consumer markets.

The SCH322x family was designed as a next-generation LPC Super I/O controller targeting cost-sensitive, space-constrained embedded platforms requiring serial expansion, keyboard/mouse support, and ACPI-compliant power management - with variant differentiation based on integrated features like hardware monitoring and parallel port.

FAQ

What is the primary function of the SCH3222-SX in a system architecture?

The SCH3222-SX serves as a Super I/O controller that consolidates legacy PC interfaces - including four NS16C550A-compatible UARTs, an 8042 keyboard/mouse controller, IrDA 1.0 infrared port, and 23 GPIOs - onto a single 84-ball WFBGA package. It connects to the host processor via the LPC bus and handles low-level I/O tasks, reducing chipset complexity and BOM count in embedded x86 designs. The SCH3222-SX does not include hardware monitoring, distinguishing it from higher-tier variants like SCH3224-SX.

Does the SCH3222-SX support hardware monitoring features such as voltage or temperature sensing?

No, the SCH3222-SX explicitly omits hardware monitoring functionality. According to Table 1-1 in DS00002121B, Hardware Monitor is marked "NO" for SCH3222, unlike SCH3227, SCH3226, and SCH3224. It lacks analog inputs for +2.5V/+5V/+12V/Vccp monitoring, thermal diode interfaces, fan tachometer inputs, PWM outputs, and the nHWM_INT signal. Designers requiring voltage or temperature supervision must select SCH3224-SX or another variant with HWM capability.

What UART capabilities does the SCH3222-SX provide, and how are they implemented?

The SCH3222-SX integrates four fully independent NS16C550A-compatible UARTs, each with 16-byte send/receive FIFOs, programmable baud rate generators, and support for 230 kbps, 460 kbps, 921 kbps, and 1.5 Mbps operation. Two additional 4-pin serial ports are permanently enabled (not strap-dependent), offering reduced-pin-count interfaces for simple peripheral connections. RS485 auto-direction control is supported via automatic nRTS assertion, eliminating need for external direction logic in half-duplex applications. All UARTs are accessible through standard LPC-configured I/O address ranges.

How does the SCH3222-SX handle power management and wake-up events?

The SCH3222-SX supports ACPI 2.0 and PC99/PC2001 compliance, enabling multiple low-power sleep states. It generates System Management Interrupts (SMI) and Programmable Wake-up Events (PME) triggered by keyboard activity, serial port data, infrared reception, GPIO state changes, or timer expiration. The SER_IRQ pin aggregates interrupts from UARTs and IR, while nIO_PME provides dedicated wake signaling. Power sequencing is managed via PWRGD_OUT and PWRGD_PS outputs, and the watchdog timer can assert PCI_RESET# on timeout - all coordinated through LPC-accessible configuration registers.

What is the package type and pin count of the SCH3222-SX, and how does it compare to other SCH322x variants?

The SCH3222-SX uses an 84-ball WFBGA package (10 mm × 10 mm, 0.8 mm pitch), the smallest in the SCH322x family. This contrasts with the 100-ball WFBGA used by SCH3224-SX and SCH3226-SX, and the 144-ball WFBGA of SCH3227-SX. The reduced ball count reflects its feature set: no hardware monitor, no parallel port, and no IDE/PCI reset buffers. Pin functions are documented in Table 2-4 of DS00002121B, confirming 23 GPIOs, four full UARTs, and fixed 4-pin serial ports - all mapped to the 84-ball layout without strapping options.