Microchip Technology SCH3226-SY

Overview

SCH3226-SY from Microchip Technology is a 3.3V LPC Super I/O controller with 5V-tolerant SIO block, integrated 8042 keyboard controller, four full-function UARTs, hardware monitoring (voltage/temperature/fan), and programmable clock output. It supports ACPI 2.0, PC99/PC2001, ISA Plug-and-Play, and Serial IRQ for legacy PC motherboard designs requiring consolidated I/O, power management, and thermal control.

For engineers reviewing the SCH3226-SY datasheet, SCH3226-SY pinout, SCH3226-SY application, or SCH3226-SY equivalent, this page delivers verified technical context, exact pin functions per strap option, hardware monitor register mapping, LPC timing compliance, and validated alternative parts for industrial embedded motherboard upgrades.

Technical Context

The SCH3226-SY implements an LPC interface compliant with Intel Low Pin Count Specification Rev 1.0, operating at 19–33 MHz, with LAD[0:3], LFRAME#, LDRQ#, and SER_IRQ signals. Its 8042-compatible keyboard controller includes 2 kB ROM, 256 B RAM, and dedicated open-drain outputs for PS/2 keyboard/mouse.

Hardware monitoring integrates three fan tachometer inputs (FANTACH1–3), three PWM outputs (PWM1–3), analog sensing for +2.5V/+5V/+12V/VCCP/VCC/VBAT/VTR, dual remote thermal diode inputs (REMOTE1±, REMOTE2±), and internal ambient sensor - all accessible via LPC-configurable registers and signaled via nHWM_INT and nTHERMTRIP.

Key Specifications

Pinout & Package

100-ball WFBGA package with 0.5 mm pitch, thermal pad on underside (HVSS/HVTR), RoHS-compliant. Pin functions depend on STRAPOPT strap: when tied to VTR (STRAPOPT=1), Device ID = 0x7F and IDE/PCI reset outputs are enabled; when tied to VSS (STRAPOPT=0), Device ID = 0x7D and those outputs map to additional serial port pins.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar Super I/O controller applications.

Compared with NCT6776D and IT8786E, the SCH3226-SY uniquely combines WFBGA packaging for thermal reliability, strap-selectable IDE/PCI reset capability, and on-chip 32-byte security key storage - making it optimal for space-constrained, safety-critical industrial x86 designs requiring long-term supply stability.

Availability

SCH3226-SY is available at Aetrix Electronics and suitable for industrial motherboard consolidation, embedded x86 power management, legacy BIOS upgrades, secure boot gateway designs, and thermal-safety-critical applications requiring stable component supply across 10+ year production lifecycles.

Supply support for SCH3226-SY includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology Inc. is a global semiconductor company specializing in microcontrollers, analog devices, and connectivity solutions, with leadership in embedded control and secure communication technologies.

The SCH3226-SY belongs to Microchip's LPC Super I/O product line, designed specifically for x86-compatible industrial and embedded motherboards requiring integrated legacy I/O, hardware monitoring, and ACPI-compliant power management in compact WFBGA packages.

FAQ

What is the function of the STRAPOPT pin on the SCH3226-SY?

The STRAPOPT pin (Ball L8) determines core functionality and device identification. When strapped to VTR, SCH3226-SY reports Device ID 0x7F and enables IDE/PCI reset outputs. When strapped to VSS, it reports Device ID 0x7D and configures those pins as additional 4-pin serial ports. This dual-mode behavior is documented in Table 2-2 of DS00002121B and must be fixed at board design stage - SCH3226-SY does not support dynamic switching.

Does the SCH3226-SY support RS485 auto-direction control?

Yes, the SCH3226-SY supports RS485 auto-direction control mode on all four full-function UARTs. This feature automatically toggles the RTS signal based on transmit buffer status - driving nRTS low when data is loaded and high when the buffer empties - eliminating external direction-control logic. Configuration is done via UART-specific control registers per channel, as specified in Section 6.0 of DS00002121B.

How many thermal diode inputs does the SCH3226-SY provide, and what is their accuracy?

The SCH3226-SY provides two differential thermal diode inputs: REMOTE1± (Balls A1–A2) and REMOTE2± (Balls A3–A4). Each supports remote temperature measurement with ±1.5°C accuracy across the −40°C to +125°C range, as validated in Appendix A of DS00002121B. These inputs are used alongside the internal ambient sensor to implement multi-zone thermal management in CPU-intensive embedded systems.

Can the SCH3226-SY generate a reset pulse independently of the host processor?

Yes, the SCH3226-SY includes a configurable watchdog timer and dedicated reset generation logic. It can assert nRSMRST (Ball A10) or drive PCI_RESET# (Ball F1) autonomously upon timeout or hardware fault. The watchdog pulse width is selectable via external strapping, and reset sources include software commands, thermal trip (nTHERMTRIP), and power-good failure - enabling fail-safe recovery without CPU intervention.

Is the 32-byte Security Key Register on the SCH3226-SY battery-backed and write-protected?

Yes, the 32-byte Security Key Register is backed by VBAT (Ball K1) and retains values across power cycles. Writes require both password authentication and explicit enable sequence via configuration registers; once locked, the register becomes read-only until next power-on reset. This mechanism prevents runtime tampering and is used for device authentication in secure boot flows, as detailed in Section 20.0 of DS00002121B.