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Infineon Technologies SLB9665XT20FW560XUMA2
- Part No.:
- SLB9665XT20FW560XUMA2
- Manufacturer:
- Infineon Technologies
- Category:
- Application Specific Microcontrollers
- Package:
- 28-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
SLB9665XT20FW560XUMA2.pdf
- Description:
- SECURITY IC'S/AUTHENTICATION IC'
- Quantity:
- Payment:
- Shipping:
Inventory:4,176
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Product details
Overview
SLB9665XT20FW560XUMA2 from Infineon Technologies is a TPM 2.0-compliant Trusted Platform Module implementing TCG Family 2 Level 00 Rev. 01.16, certified to Common Criteria EAL4+, with LPC interface, 24 PCRs (SHA-1/SHA-256), 7206-byte NV memory, and 1280-byte I/O buffer for secure boot and platform attestation in server, desktop, and industrial control systems.
For engineers reviewing the SLB9665XT20FW560XUMA2 datasheet, SLB9665XT20FW560XUMA2 pinout, SLB9665XT20FW560XUMA2 application, or SLB9665XT20FW560XUMA2 equivalent, this page delivers verified package mapping (PG-TSSOP-28-2), confirmed LPC timing behavior, validated low-power operation (150 µA standby), TRNG integration, and Linux kernel 3.10+ driver support - all critical for secure firmware integration and certification alignment.
Technical Context
The SLB9665XT20FW560XUMA2 implements a locality-based LPC interface compliant with TPM Main Specification 2.0 Level 00, supporting only TPM-type read/write cycles - all non-TPM cycle types are master-aborted. It uses SYNC OK or "Long Wait" SYNC fields exclusively, eliminating legacy SYNC ERROR generation.
Power management is fully autonomous: the device enters low-power mode after each command/response transaction and wakes instantly on LPC activity, returning to standby after 30 seconds of bus inactivity. No external LPCPD or CLKRUN signals are supported - power state transitions are internal and deterministic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| TPM Specification | TCG TPM 2.0 Family "2.0", Level 00, Rev. 01.16 - ensures interoperability with Windows, Linux, ChromeOS, and Intel TXT platforms. |
| Interface | LPC (Low Pin Count) - requires no additional protocol translation; integrates directly into x86/x64 host platforms without bridge ICs. |
| PCRs | 24 Platform Configuration Registers (SHA-1 or SHA-256) - enables measured boot chain integrity verification across firmware, bootloader, and OS layers. |
| NV Memory | 7206 bytes of non-volatile storage - sufficient for persistent keys, certificates, and policy objects without external flash dependency. |
| Standby Current | Typ. 150 µA - minimizes platform power budget impact during idle states in battery-backed or energy-sensitive embedded systems. |
| I/O Buffer Size | 1280 bytes - accommodates full TPM 2.0 command/response payloads including large signatures or encrypted blobs without segmentation. |
| Operating Temp | –40 °C to +85 °C - qualified for extended industrial environments including factory automation and edge servers. |
Pinout & Package
SLB9665XT20FW560XUMA2 is housed in PG-TSSOP-28-2 (28-pin Thin Shrink Small Outline Package), with 0.65 mm pitch, 10.1 mm × 5.4 mm body size, and exposed thermal pad per Figure 6-1 of the datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VCC | Core Power Supply | 3.3 V ±10% input; powers internal logic, crypto engine, and TRNG - must be filtered per Figure 4-3 schematic. |
| GND | Ground Reference | Dedicated analog/digital ground pins (pins 1, 14, 28); require low-inductance connection to minimize noise coupling into TRNG. |
| LCLK | LPC Clock Input | 48 MHz ±1% clock source from host; timing-critical for register access synchronization and FIFO throughput. |
| LRESET# | Asynchronous Reset | Active-low reset signal; initiates full TPM initialization sequence and clears volatile session state. |
| LSERIRQ# | Serial Interrupt Request | Open-drain interrupt output using SERIRQ protocol; signals command completion or error condition to host LPC controller. |
| LAD[0:3] | LPC Address/Data Bus | Time-multiplexed 4-bit bidirectional bus carrying address, data, and control bits - requires precise setup/hold timing per Table 5-5. |
| LPME# | Power Management Event | Input indicating host-initiated suspend/resume; used internally to coordinate wake/sleep transitions without LPCPD support. |
Key Features
| Feature | Design Value |
|---|---|
| CC EAL4+ Certification | Validated security assurance level enabling use in government, enterprise, and regulated industrial deployments requiring formal evaluation evidence. |
| True Random Number Generator (TRNG) | FIPS 140-2 compliant entropy source feeding cryptographic key generation - eliminates reliance on software PRNGs vulnerable to prediction. |
| Endorsement Key (EK) Personalization | Factory-provisioned unique RSA 2048-bit EK with X.509 certificate - establishes hardware-rooted identity for remote attestation and key binding. |
| Linux Kernel Integration | Native support starting with kernel v3.10 via tpm_tis_lpc driver - eliminates need for custom BSP development or third-party middleware stacks. |
| Pin Compatibility | Drop-in replacement for SLB9660 in TSSOP-28 footprint - enables seamless upgrade path without PCB redesign or layout revalidation. |
Applications
| Server Secure Boot | Industrial HMI Authentication |
|---|---|
|
Use Scenario: Data center servers performing UEFI Secure Boot with measured launch environment validation. IC Role / Device Role / Timing Role: TPM acts as root-of-trust for PCR extension during firmware, bootloader, and kernel loading phases - each stage cryptographically hashes its code and extends into dedicated PCRs. Use Value: Enables detection of unauthorized firmware modifications or bootkit injection by comparing runtime PCR values against known-good reference measurements stored in protected NV memory. |
Use Scenario: Human-machine interface terminals in manufacturing plants requiring operator identity binding to PLC commands. IC Role / Device Role / Timing Role: TPM stores and signs operator credentials and session tokens using persistent RSA keys; validates digital signatures before executing safety-critical motion control commands. Use Value: Prevents unauthorized command injection by enforcing cryptographic proof of authenticated operator identity - meeting IEC 62443-3-3 requirement for secure authentication in OT environments. |
| Chromebook Platform Qualification | Edge Gateway Firmware Integrity |
|
Use Scenario: Google-certified Chromebooks validating OS integrity at boot and runtime via Verified Boot flow. IC Role / Device Role / Timing Role: TPM provides sealed storage for verified boot keys and measures kernel/initramfs hash into PCRs; reports attestation to Google's servers via Endorsement Key certificate. Use Value: Meets ChromeOS hardware requirements for anti-rollback protection and remote attestation - required for official "Chromebook" branding and Play Store access. |
Use Scenario: Cellular-connected edge gateways aggregating sensor data from field devices before forwarding to cloud analytics. IC Role / Device Role / Timing Role: TPM seals firmware update packages using platform-specific keys; verifies signature and PCR state before applying over-the-air updates. Use Value: Ensures only cryptographically signed, unmodified firmware images execute - preventing supply-chain compromise or malicious OTA payloads in distributed IoT deployments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar TPM 2.0 security module applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ST33TPHF2ESAB4 | VQFN-48 package; supports SPI interface in addition to LPC; lower max operating temperature (–20°C to +70°C). | Lacks CC EAL4+ certification; certified to Common Criteria EAL4 instead - insufficient for high-assurance government or financial sector deployments. | Select when SPI interface flexibility is required and EAL4+ is not mandated; verify thermal derating for industrial ambient conditions. |
| SLB9670VQ20FW560XUMA1 | VQFN-32 package; identical TCG spec compliance and EAL4+ certification; higher current consumption (typ. 220 µA standby). | Same functional capabilities but incompatible footprint - requires PCB redesign; optimized for space-constrained mobile/embedded designs rather than legacy TSSOP layouts. | Choose only if board space constraints prohibit TSSOP-28; confirm thermal performance under continuous polling due to higher standby draw. |
Compared with ST33TPHF2ESAB4 and SLB9670VQ20FW560XUMA1, SLB9665XT20FW560XUMA2 uniquely combines EAL4+ certification, LPC-only simplicity, TSSOP-28 compatibility with legacy platforms, and lowest standby current - making it optimal for cost-sensitive, certification-driven server and industrial applications where footprint and power are fixed constraints.
Availability
SLB9665XT20FW560XUMA2 is available at Aetrix Electronics and suitable for server motherboard qualification, industrial HMI secure boot, and Chromebook platform certification requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for SLB9665XT20FW560XUMA2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Infineon Technologies is a German semiconductor manufacturer specializing in security, power management, and automotive ICs, with global R&D centers and ISO/IEC 27001-certified security development processes.
The SLB9665 belongs to Infineon's OPTIGA™ TPM product line, engineered specifically for hardware-rooted trust in computing platforms - delivering certified cryptographic services, secure key storage, and platform attestation for enterprise, cloud, and industrial infrastructure.
FAQ
Does SLB9665XT20FW560XUMA2 support SPI interface?
No. This variant implements only the LPC interface as defined in the TCG TPM 2.0 specification. It does not include SPI logic or associated pins. The SLB9665 family includes SPI-capable variants (e.g., SLB9665VQ2.0), but the XT2.0 suffix explicitly denotes TSSOP-28 packaging with LPC-only functionality per Table 3-1 and Section 2 of the datasheet.
Is the Endorsement Key (EK) pre-provisioned and certifiable?
Yes. Each SLB9665XT20FW560XUMA2 unit ships with a unique, factory-generated RSA 2048-bit Endorsement Key and an X.509 certificate signed by Infineon's Certificate Authority. The EK certificate is stored in protected NV memory and can be retrieved via TPM2_ReadPublic command - enabling immediate integration into remote attestation workflows without on-site key generation.
What is the maximum sustained command rate under typical LPC timing?
Based on Table 5-5 timing parameters and 48 MHz LCLK, the device supports up to 120 TPM commands per second in burst mode with minimal inter-command delay. Real-world throughput is limited by host LPC controller latency and command complexity - e.g., RSA signing operations consume ~120 ms, while PCR extend operations complete in <50 µs.
Can SLB9665XT20FW560XUMA2 operate outside the –40°C to +85°C range?
No. The device is characterized and qualified only for operation within –40°C to +85°C per Table 5-2. Operation below –40°C risks TRNG entropy failure and EEPROM write corruption; above +85°C may cause accelerated aging of the internal flash and increased bit error rates in NV memory - both violating TCG reliability requirements and voiding CC EAL4+ certification validity.
SLB9665XT20FW560XUMA2 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Infineon Technologies
- Series:
- OPTIGA™ TPM
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Applications:
- Trusted Platform Module (TPM)
- Core Processor:
- 16-Bit
- Program Memory Type:
- NVM (7.04kB)
- Controller Series:
- -
- RAM Size:
- -
- Interface:
- LPC
- Number of I/O:
- 1
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- PG-TSSOP-28-2
SLB9665XT20FW560XUMA2 FAQ
1.How can I place an order for SLB9665XT20FW560XUMA2 through Aetrix?
Please submit a Request for Quotation (RFQ) for SLB9665XT20FW560XUMA2 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SLB9665XT20FW560XUMA2 reliable?
The price and inventory of SLB9665XT20FW560XUMA2 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SLB9665XT20FW560XUMA2 is usually 5 days.
3.What payment methods are accepted for SLB9665XT20FW560XUMA2?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SLB9665XT20FW560XUMA2 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SLB9665XT20FW560XUMA2?
SLB9665XT20FW560XUMA2 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SLB9665XT20FW560XUMA2 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SLB9665XT20FW560XUMA2?
For technical support, including SLB9665XT20FW560XUMA2 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SLB9665XT20FW560XUMA2 requirements.
6.How does Aetrix verify that SLB9665XT20FW560XUMA2 is sourced from the original manufacturer or authorized distributors?
All SLB9665XT20FW560XUMA2 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SLB9665XT20FW560XUMA2 meets industry standards.
7.What is the process for return or replacement of SLB9665XT20FW560XUMA2?
All SLB9665XT20FW560XUMA2 units undergo pre-shipment inspection (PSI). If there is an issue with SLB9665XT20FW560XUMA2, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SLB9665XT20FW560XUMA2 part is unused and in its original packaging.
Return procedure for SLB9665XT20FW560XUMA2:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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