Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Part Number*
Quantity*
Message
Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Upload My List
Message

Infineon Technologies SLB9670VQ20FW760XUMA1

Part No.:
SLB9670VQ20FW760XUMA1
Manufacturer:
Infineon Technologies
Category:
Application Specific Microcontrollers
Package:
32-VFQFN Exposed Pad
Datasheet:
AetrixSLB9670VQ20FW760XUMA1.pdf
Description:
SECURITY IC'S/AUTHENTICATION IC'
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:4,786

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Part Number
Quantity*
Price
Name*
Company
Email*
Comments

Product details

Overview

SLB9670VQ20FW760XUMA1 from Infineon is a TPM 2.0 Trusted Platform Module implementing TCG family 2.0 specifications, certified to FIPS 140-2 Level 2 (Certificate #3492), featuring SPI interface up to 43 MHz, 24 PCRs (SHA-1/SHA-256), and 6962 bytes of free NV memory. It serves as the root-of-trust for platform integrity in desktop, notebook, and Chromebook systems requiring Intel TXT or Windows certification.

For engineers reviewing the SLB9670VQ20FW760XUMA1 datasheet, SLB9670VQ20FW760XUMA1 pinout, SLB9670VQ20FW760XUMA1 application, or SLB9670VQ20FW760XUMA1 equivalent, key selection criteria include SPI timing compliance, low standby current (110 µA), EK personalization support, and PG-VQFN-32-13 package compatibility with legacy SLB9670 TPM1.2 designs.

Technical Context

The SLB9670VQ20FW760XUMA1 implements a hardware-rooted TPM 2.0 stack with full firmware validation per FIPS 140-2 Level 2, supporting SHA-256 PCR extensions and secure boot attestation. Its internal power management automatically transitions to low-power state post-transaction without host intervention.

It uses SPI Mode 0 (CPOL=0, CPHA=0) with strict timing requirements: tSU(CS) ≥ 20 ns, tH(CS) ≥ 20 ns, and SCLK max 43 MHz. The device supports up to 64 active sessions and 7 persistent objects, enabling concurrent cryptographic operations in multi-tenant OS environments like Linux kernel-integrated TPM stacks.

Key Specifications

Parameter Value and Actual Design Meaning
TPM Specification TCG TPM Main Specification 2.0 - enables standardized attestation, sealing, and key hierarchy across Windows, Linux, and ChromeOS platforms.
SPI Interface Speed Up to 43 MHz - supports high-throughput command/response cycles for rapid PCR extension and NV write operations.
Standby Current Typ. 110 µA - minimizes battery drain in always-on security contexts such as Chromebook firmware verification.
PCR Count 24 PCRs (SHA-1 or SHA-256) - provides granular platform state measurement for UEFI Secure Boot, measured boot, and remote attestation.
NV Memory Min. 6962 bytes free - accommodates multiple sealed keys, certificates, and policy-based NV indices without external storage dependency.
Operating Temp –20 °C to +85 °C - validated for standard industrial and client computing thermal envelopes.
I/O Buffer Size 1420 Byte - handles full-size TPM2_Commit or TPM2_PolicySecret commands with embedded authorization structures.

Pinout & Package

SLB9670VQ20FW760XUMA1 is housed in a PG-VQFN-32-13 package (5 mm × 5 mm, 0.5 mm pitch, exposed thermal pad). Pin assignment follows TCG-compliant layout with dedicated SPI, reset, interrupt, and optional GPIO/PP signals.

Pin/Terminal Circuit Role Design Meaning
20 (CS#) Input / Chip Select Active-low SPI chip select; requires ≥20 ns setup/hold relative to SCLK edge for reliable command framing.
19 (SCLK) Input / Clock SPI clock input (Mode 0 only); max 43 MHz; drives internal state machine and crypto engine timing.
21 (MOSI) Input / Data In Receives TPM command buffers including header, authorization, and parameter sections; sampled on SCLK rising edge.
24 (MISO) Output / Data Out Tri-state output delivering response buffers; driven only when CS# is asserted and transaction is active.
18 (PIRQ#) Output / Interrupt Open-drain interrupt signal indicating pending response or asynchronous event (e.g., physical presence assertion); requires external pull-up.
17 (RST#) Input / Reset Asynchronous active-low reset; forces full internal state clear and reinitialization; weak internal pull-up ensures defined startup state.
6 (GPIO) I/O / Reserved GPIO-Express-00 signal unused in TPM2.0 mode; may be left floating with internal pull-up; no functional impact on core TPM operation.
7 (PP) Input / Physical Presence Physical Presence input per TCG spec; internal pulldown allows detection of button press; not required for basic attestation flows.
8, 22 (VDD) Power Supply Core 3.3 V supply pins; each must be decoupled with 100 nF capacitor to GND for noise immunity during crypto operations.
2, 9, 23, 32 (GND) Ground Dedicated ground connections; mandatory for stable reference and EMI control across high-speed SPI and internal analog RNG circuitry.

Key Features

Feature Design Value
FIPS 140-2 Level 2 Certification Validated hardware and firmware (Certificate #3492, 2019) - satisfies U.S. federal and enterprise procurement mandates for cryptographic module assurance.
Endorsement Key Personalization Factory-provisioned EK with X.509 certificate - enables out-of-box identity binding and eliminates need for post-silicon key generation infrastructure.
SHA-256 PCR Support Full 24-PCR bank configurable for SHA-256 - meets modern OS requirements for measured boot integrity beyond legacy SHA-1 limitations.
Linux Kernel Integration Built-in support via tpm_tis_spi driver - enables transparent use in initramfs, IMA/EVM, and dm-verity without custom firmware or middleware.
Low-Power Transaction Handling Automatic wake-on-SPI activity and return-to-standby (<110 µA) - preserves battery life in mobile platforms while maintaining instant responsiveness.

Applications

Secure Boot Validation Remote Attestation

Use Scenario: Verifying UEFI firmware and OS loader integrity during system boot on Windows 10/11 laptops.

IC Role / Device Role / Timing Role: Root-of-trust anchor that measures and extends PCRs before code execution, enforcing chain-of-trust.

Use Value: Prevents unauthorized firmware modification by cryptographically binding boot state to hardware-bound keys stored in protected NV memory.

Use Scenario: Proving platform health to cloud services (e.g., Azure Attestation, Google Cloud Confidential Computing).

IC Role / Device Role / Timing Role: TPM2.0 attestation engine generating signed quotes containing PCR values and nonce.

Use Value: Enables zero-trust access control by providing verifiable evidence of unmodified OS configuration and runtime state.

Chromebook Firmware Verification Linux IMA/EVM Integrity Enforcement

Use Scenario: Enforcing Verified Boot on Google Chromebooks using firmware-level TPM-backed measurements.

IC Role / Device Role / Timing Role: Hardware-enforced measurement point for RO firmware, RW firmware, and kernel image loading.

Use Value: Blocks execution of tampered firmware or kernel modules by validating signatures against EK-bound keys prior to load.

Use Scenario: Securing file integrity metadata in enterprise Linux servers using Integrity Measurement Architecture.

IC Role / Device Role / Timing Role: Cryptographic signing engine for IMA-appraisal and EVM-protected extended attributes.

Use Value: Ensures runtime file integrity by sealing hash values into TPM NV space and verifying them at access time.

Equivalent & Alternatives

The following parts are listed as comparable options for similar TPM 2.0 security module applications.

Alternative Part Technical Difference Application Difference Selection Advice
SLB9670XQ20FW760XUMA1 Enhanced temperature range (–40 °C to +85 °C) vs. standard (–20 °C to +85 °C); identical electrical and functional specs. Required for automotive infotainment or industrial edge gateways operating outside consumer thermal envelope. Select XQ variant when ambient operating temperature exceeds –20 °C minimum or when long-term reliability under thermal cycling is critical.
Infineon OPTIGA™ TPM SLB9673VQ20FW760XUMA1 Successor with extended NV memory (≥12 kB), higher session limits (up to 128 active sessions), and enhanced side-channel resistance. Targeted at server platforms and confidential computing workloads requiring larger policy storage and concurrent attestation sessions. Choose SLB9673 for new designs needing future-proofing, higher scalability, or compliance with emerging TCG v2.0 rev1.85+ features.

Compared with SLB9670XQ20FW760XUMA1, the VQ variant trades extended temperature tolerance for cost and qualification simplicity in client platforms; compared with SLB9673, it offers proven maturity and lower BOM cost where advanced session scaling or >6962-byte NV usage is unnecessary.

Availability

SLB9670VQ20FW760XUMA1 is available at Aetrix Electronics and suitable for secure boot validation, remote attestation, Chromebook firmware verification, and Linux IMA/EVM integrity enforcement requiring stable component supply and long-term lifecycle support.

Supply support for SLB9670VQ20FW760XUMA1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Infineon Technologies AG is a German semiconductor manufacturer specializing in power management, security ICs, and automotive microcontrollers, with global R&D and manufacturing infrastructure.

This part belongs to the OPTIGA™ TPM product line, designed specifically to deliver certified, standards-compliant hardware roots of trust for endpoint security in PCs, notebooks, Chromebooks, and embedded systems.

FAQ

Is SLB9670VQ20FW760XUMA1 compatible with TPM 1.2 host software?

No. It implements only TPM 2.0 specification (TCG Main Specification 2.0) and lacks backward-compatible TPM 1.2 command set or register map. Host drivers must use TCG 2.0-compliant stacks such as Microsoft TPM Base Services (TBS) or Linux tpm_tis_spi. Migration requires firmware and OS updates.

Does this device require external firmware updates for security patches?

No. All firmware is pre-validated and immutable per FIPS 140-2 Level 2 requirements. Security updates are delivered via Infineon's certified field update mechanism (FWU), which requires signed update packages and physical presence confirmation - no user-accessible flash programming interface exists.

What is the role of the PP (Physical Presence) pin in standard operation?

The PP pin (Pin 7) is a TCG-mandated input for physical presence assertion, used during sensitive operations like dictionary attack lockout reset or NV index authorization changes. It has an internal pulldown resistor and may be left unconnected if physical presence logic is implemented externally or disabled via platform policy.

Can the GPIO pin be repurposed for general I/O in TPM 2.0 mode?

No. Pin 6 (GPIO) is reserved as GPIO-Express-00 in the TCG specification but is unused in SLB9670VQ20FW760XUMA1's TPM 2.0 firmware implementation. It has an internal pull-up resistor and must remain unconnected; no configuration register or command enables functional use.

SLB9670VQ20FW760XUMA1 Specifications

Product attributes
Attribute value
Manufacturer:
Infineon Technologies
Series:
OPTIGA™ TPM
Package/Case:
32-VFQFN Exposed Pad
Packaging:
Tape & Reel (TR)
Product Status:
Active
Programmable:
Not Verified
Applications:
Trusted Platform Module (TPM)
Core Processor:
16-Bit
Program Memory Type:
NVM (6.8kB)
Controller Series:
-
RAM Size:
-
Interface:
SPI
Number of I/O:
1
Voltage - Supply:
1.65V ~ 3.6V
Operating Temperature:
-20°C ~ 85°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
PG-VQFN-32-13

SLB9670VQ20FW760XUMA1 FAQ

1.How can I place an order for SLB9670VQ20FW760XUMA1 through Aetrix?

Please submit a Request for Quotation (RFQ) for SLB9670VQ20FW760XUMA1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for SLB9670VQ20FW760XUMA1 reliable?

The price and inventory of SLB9670VQ20FW760XUMA1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SLB9670VQ20FW760XUMA1 is usually 5 days.

3.What payment methods are accepted for SLB9670VQ20FW760XUMA1?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SLB9670VQ20FW760XUMA1 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for SLB9670VQ20FW760XUMA1?

SLB9670VQ20FW760XUMA1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your SLB9670VQ20FW760XUMA1 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for SLB9670VQ20FW760XUMA1?

For technical support, including SLB9670VQ20FW760XUMA1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SLB9670VQ20FW760XUMA1 requirements.

6.How does Aetrix verify that SLB9670VQ20FW760XUMA1 is sourced from the original manufacturer or authorized distributors?

All SLB9670VQ20FW760XUMA1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SLB9670VQ20FW760XUMA1 meets industry standards.

7.What is the process for return or replacement of SLB9670VQ20FW760XUMA1?

All SLB9670VQ20FW760XUMA1 units undergo pre-shipment inspection (PSI). If there is an issue with SLB9670VQ20FW760XUMA1, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The SLB9670VQ20FW760XUMA1 part is unused and in its original packaging.

Return procedure for SLB9670VQ20FW760XUMA1:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

SLB9670VQ20FW760XUMA1 Tags

  • SLB9670VQ20FW760XUMA1
  • SLB9670VQ20FW760XUMA1 PDF
  • SLB9670VQ20FW760XUMA1 Datasheet
  • SLB9670VQ20FW760XUMA1 Specifications
  • SLB9670VQ20FW760XUMA1 Images
  • Infineon Technologies
  • Infineon Technologies SLB9670VQ20FW760XUMA1
  • Buy SLB9670VQ20FW760XUMA1
  • SLB9670VQ20FW760XUMA1 Price
  • SLB9670VQ20FW760XUMA1 Distributor
  • SLB9670VQ20FW760XUMA1 Supplier
  • SLB9670VQ20FW760XUMA1 Wholesale
Related Products
CYPD3175-24LQXQ
CYPD3175-24LQXQ

Infineon Technologies

SLB9672VU20FW1523XTMA1
SLB9672VU20FW1523XTMA1

Infineon Technologies

SLB9670VQ20FW785XTMA1
SLB9670VQ20FW785XTMA1

Infineon Technologies

SLB9672XU20FW1523XTMA1
SLB9672XU20FW1523XTMA1

Infineon Technologies

SLB9673XU20FW2613XTMA1
SLB9673XU20FW2613XTMA1

Infineon Technologies

CYPD3125-40LQXIT
CYPD3125-40LQXIT

Infineon Technologies

AT97SC3204-U2A1A-20
AT97SC3204-U2A1A-20

Microchip Technology

AT97SC3204-U2A1A-10
AT97SC3204-U2A1A-10

Microchip Technology

SLM9670AQ20FW1311XTMA1
SLM9670AQ20FW1311XTMA1

Infineon Technologies

SLB9672XU20FW1613XTMA1
SLB9672XU20FW1613XTMA1

Infineon Technologies

SLB9672AU20FW1613XTMA1
SLB9672AU20FW1613XTMA1

Infineon Technologies

SLB9673AU20FW2613XTMA1
SLB9673AU20FW2613XTMA1

Infineon Technologies

Tech Hub

Search

Search

PRODUCT

PRODUCT

PHONE

PHONE

USER

USER