STMicroelectronics SMP100MC-160
- Part No.:
- SMP100MC-160
- Manufacturer:
- STMicroelectronics
- Category:
- Thyristors
- Package:
- DO-214AA, SMB
- Datasheet:
-
SMP100MC-160.pdf
- Description:
- THYRISTOR 160V 300A DO-214AA
- Quantity:
- Payment:

- Shipping:

Inventory:3,699
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
SMP100MC-160 from STMicroelectronics is a bidirectional thyristor surge suppressor (TSS) designed for fail-safe overvoltage protection on high-speed data lines. It features a 160 V breakover voltage (VBO), 25 mA holding current (IH), 100 A repetitive peak pulse current (10/1000 μs), and micro capacitance of 50 pF at 50 V - enabling low-signal-distortion protection in ADSL2+ and VDSL line cards.
For engineers reviewing the SMP100MC-160 datasheet, SMP100MC-160 pinout, SMP100MC-160 application, or SMP100MC-160 equivalent, this device is selected for telecom-grade transient suppression where UL497B recognition, IEC 61000-4-5 compliance, and sub-30 pF capacitance at 2 V bias are critical design requirements.
Technical Context
The SMP100MC-160 operates as a voltage-triggered crowbar device with bidirectional conduction, entering low-impedance latching mode upon exceeding its dynamic breakover voltage (205 V typ.) and sustaining conduction until current falls below 25 mA IH. Its fail-safe short-circuit behavior under overstress ensures equipment-level continuity of protection without open-circuit degradation.
Designed for telecom infrastructure interfaces, it meets GR-1089 Core (first/second/intra-building levels), ITU-T K20/K21, and TIA/EIA IS-968 lightning surge standards - validated with 100 A (10/1000 μs), 140 A (10/560 μs), and 150 A (5/310 μs) surge ratings and zero external series resistance requirement in standard test configurations.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VBO (Dynamic) | 205 V typical - triggers crowbar action before downstream ICs exceed absolute maximum ratings |
| VBO (Static) | 200 V min - ensures consistent turn-on threshold across temperature and aging |
| IH | 25 mA min - guarantees reliable latching during sustained fault currents above 25 mA |
| C (at 50 V) | 50 pF - preserves signal integrity on ADSL2+/VDSL lines up to 30 MHz |
| C (at 2 V) | 30 pF - enables compatibility with Ethernet PHY interfaces requiring ultra-low parasitic capacitance |
| IPP (10/1000 μs) | 100 A - withstands repeated lightning-induced surges per IEC 61000-4-5 Level 4 |
| IR (max) | 2 μA - minimizes standby power loss and leakage-induced baseline drift in analog front-ends |
Pinout & Package
Package: DO-214AA (SMB), JEDEC-registered surface-mount package with UL94 V0 epoxy, lead-free plating, and halogen-free molding compound. Thermal resistance Rth(j-a) = 100 °C/W with recommended footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Anode (A) | Current entry terminal in forward conduction mode | Bidirectional operation means either terminal serves as anode depending on polarity of surge |
| Cathode (K) | Current exit terminal in forward conduction mode | No dedicated polarity - terminals are functionally symmetric; device conducts equally in both directions |
Key Features
| Feature | Design Value |
|---|---|
| Bidirectional crowbar protection | Eliminates need for back-to-back diac or dual-device layouts on differential data lines |
| Low VBO / VR ratio | Ensures fast, predictable triggering well below system DC operating voltage (e.g., 48 V telecom lines) |
| Micro capacitance (30–50 pF) | Maintains >20 dB return loss up to 30 MHz, preserving ADSL/VDSL bit error rate performance |
| Fail-safe short-circuit mode | Guarantees continued protection even after multiple surges - no open-circuit failure risk |
| UL497B recognized & GR-1089 compliant | Reduces certification effort for central office and CPE equipment targeting North American telecom markets |
Applications
| ADSL2+ Line Card Protection | VDSL Central Office Interface |
|---|---|
Use Scenario: Protects DSLAM line cards from induced surges on twisted-pair subscriber loops exposed to lightning and AC power cross faults. IC Role / Device Role / Timing Role: Bidirectional crowbar clamping element placed between tip/ring and PHY transceiver, triggered within nanoseconds of overvoltage onset. Use Value: 30 pF capacitance at 2 V bias prevents echo cancellation degradation and maintains SNR >35 dB across 2.2 MHz band. | Use Scenario: Shields upstream/downstream ports of carrier-grade VDSL distribution frames against GR-1089 Core second-level surges (5 kV, 2/10 μs). IC Role / Device Role / Timing Role: Primary surge arrestor in fail-safe configuration, shorting fault energy directly to ground plane before reaching line driver ICs. Use Value: 100 A (10/1000 μs) rating supports multi-event endurance testing without parameter shift or thermal runaway. |
| Modem/Fax Terminal Protection | Ethernet PSE Port Surge Suppression |
Use Scenario: Integrated into residential gateway modems to meet UL1459 and IEC 950 safety requirements for telephone line interface. IC Role / Device Role / Timing Role: First-line protector on RJ11 interface, clamping transients before they reach isolation transformers and codec ICs. Use Value: UL497B recognition eliminates need for additional external certification testing of the surge path. | Use Scenario: Protects Power Sourcing Equipment (PSE) controller pins in IEEE 802.3af/at PoE switches from induced surges on data pairs. IC Role / Device Role / Timing Role: Low-capacitance crowbar placed across MDI pairs, activated only during >200 V transients to avoid interfering with 100BASE-TX signaling. Use Value: 50 pF at 50 V bias ensures <0.5% signal attenuation at 125 MHz, preserving auto-negotiation reliability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar thyristor surge suppressor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Littlefuse SP1002-014 | 140 V VBO (static), 30 pF @ 2 V, 100 A (8/20 μs) IPP | Optimized for 8/20 μs waveforms; lower VBO limits use in 48 V systems | Select when primary threat is utility-side surges per IEC 61000-4-5 with 8/20 μs profile |
| Littelfuse SP1002-020 | 200 V VBO (static), 20 pF @ 2 V, 100 A (8/20 μs) IPP | Lower capacitance but higher VBO - better for 54 V PoE systems, less suitable for ADSL2+ | Select when protecting 100BASE-TX PHYs requiring <25 pF and higher DC margin |
Compared with SMP100MC-160, SP1002-014 offers tighter VBO tolerance for 48 V telecom lines but lacks GR-1089 Core validation; SP1002-020 provides lower capacitance for Ethernet but requires higher trigger voltage - making SMP100MC-160 optimal for balanced ADSL2+/VDSL protection where 160 V VBO and 30–50 pF trade-off is validated.
Availability
SMP100MC-160 is available at Aetrix Electronics and suitable for ADSL2+ line card design, VDSL central office interface protection, and modem/fax terminal surge compliance requiring stable component supply and full traceability.
Supply support for SMP100MC-160 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, MCU, power, and protection devices for industrial, automotive, and communications markets.
The SMP100MC series belongs to ST's Telecom Circuit Protector product line, engineered specifically to replace MOVs and GDTs in high-data-rate line interfaces where low capacitance, precise VBO, and fail-safe crowbar behavior are mandatory.
FAQ
What is the fail-safe behavior of SMP100MC-160 during surge events?
Under overvoltage stress exceeding its breakover voltage, SMP100MC-160 latches into a low-impedance short-circuit state and remains conductive until current drops below 25 mA. This fail-safe mode prevents open-circuit failure, ensuring continuous protection even after multiple surges - verified per IEC 61000-4-5 and GR-1089 Core test protocols.
Does SMP100MC-160 require an external series resistor for standard compliance?
No. SMP100MC-160 meets GR-1089 Core, ITU-T K20/K21, and IEC 61000-4-5 requirements without any external series resistor - confirmed in Table 1 of DS3406 Rev 6, where minimum serial resistor is listed as 0 Ω for all applicable waveform combinations including 10/1000 μs and 10/700 μs.
How does the 30 pF capacitance at 2 V bias impact ADSL2+ performance?
At 2 V reverse bias, SMP100MC-160 exhibits 30 pF capacitance - low enough to maintain >20 dB return loss across the full ADSL2+ band (up to 2.2 MHz), preventing echo cancellation errors and ensuring bit error rates remain below 10⁻⁷. This value is measured per Figure 9 in DS3406 Rev 6 at 1 MHz.
Is SMP100MC-160 compatible with lead-free reflow soldering processes?
Yes. The SMB (DO-214AA) package supports lead-free reflow with a maximum lead temperature of 260 °C for 10 seconds, as specified in Table 2 of DS3406 Rev 6. Its halogen-free molding compound and lead-free plating comply with RoHS and JEDEC J-STD-020D moisture sensitivity level 1 requirements.
SMP100MC-160 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Package/Case:
- DO-214AA, SMB
- Series:
- SMP, TRISIL™
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Voltage - Breakover:
- 200V
- Voltage - Off State:
- 160V
- Voltage - On State:
- -
- Current - Peak Pulse (8/20µs):
- 300 A
- Current - Peak Pulse (10/1000µs):
- 100 A
- Current - Hold (Ih):
- 150 mA
- Number of Elements:
- 1
- Capacitance:
- 50pF
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SMB
SMP100MC-160 FAQ
1.How can I place an order for SMP100MC-160 through Aetrix?
Please submit a Request for Quotation (RFQ) for SMP100MC-160 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for SMP100MC-160 reliable?
The price and inventory of SMP100MC-160 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for SMP100MC-160 is usually 5 days.
3.What payment methods are accepted for SMP100MC-160?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for SMP100MC-160 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for SMP100MC-160?
SMP100MC-160 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your SMP100MC-160 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for SMP100MC-160?
For technical support, including SMP100MC-160 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your SMP100MC-160 requirements.
6.How does Aetrix verify that SMP100MC-160 is sourced from the original manufacturer or authorized distributors?
All SMP100MC-160 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that SMP100MC-160 meets industry standards.
7.What is the process for return or replacement of SMP100MC-160?
All SMP100MC-160 units undergo pre-shipment inspection (PSI). If there is an issue with SMP100MC-160, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The SMP100MC-160 part is unused and in its original packaging.
Return procedure for SMP100MC-160:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
SMP100MC-160 Tags

-
TISP4015L1AJR-S
Bourns Inc.

-
TISP4015L1BJR-S
Bourns Inc.

-
SMP100LC-270
STMicroelectronics

-
TISP4240M3BJR-S
Bourns Inc.

-
SMP100LC-35
STMicroelectronics

-
SMP100LC-65
STMicroelectronics

-
SMP100LC-8
STMicroelectronics

-
TISP4P035L1NR-S
Bourns Inc.

-
TISP4350H3BJR-S
Bourns Inc.

-
TISP4011H1BJR-S
Bourns Inc.

-
SMP100LC-400
STMicroelectronics

-
P0300SALRP
Littelfuse Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
