STMicroelectronics STGAP3SXSTR
- Part No.:
- STGAP3SXSTR
- Manufacturer:
- STMicroelectronics
- Category:
- Gate Drivers
- Package:
- -
- Datasheet:
-
STGAP3SXSTR.pdf
- Description:
- GALVANICALLY ISOLATED 6/10 A SIN
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Inventory:880
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Product details
Overview
STGAP3SXSTR from STMicroelectronics is a reinforced-galvanically-isolated 10 A single-channel gate driver IC for high-voltage SiC MOSFETs and IGBTs, featuring ±200 V/ns CMTI, 75 ns propagation delay, desaturation protection with 9.00 V threshold (SiC-optimized), adjustable soft turn-off (5 µs typical), and integrated Miller clamp driver (0.3 A source / 0.5 A sink). It operates up to 1200 V rail voltage and supports bipolar gate driving (−10 V to +32 V) in industrial motor inverters.
For engineers reviewing the STGAP3SXSTR datasheet, STGAP3SXSTR pinout, STGAP3SXSTR application, or STGAP3SXSTR equivalent, this page delivers verified technical context on UVLO thresholds (VH UVLO = 13.6 V typ), SO-16W package isolation specs (5.7 kVRMS), soft-turn-off current (800 mA), DESAT response time (150 ns), and diagnostic open-drain outputs (RDY/DIAG) - all critical for high-reliability power stage design.
Technical Context
The STGAP3SXSTR implements capacitive galvanic isolation between logic-side control (3.3/5 V TTL/CMOS inputs) and floating power-stage side (VH up to +32 V, VL down to −10 V), enabling direct drive of 1200 V SiC switches without external level shifters. Its dual-input architecture (IN+/IN−) supports hardware interlocking to prevent cross-conduction in half-bridge topologies.
It integrates ultrafast desaturation detection (9.00 V threshold, 200 ns blanking, 150 ns intervention), active Miller clamp pre-driver (2.0 V clamp threshold, 450 mA sink), and temperature shutdown (164 °C). Fault states are signaled via two independent open-drain outputs: RDY (UVLO/overtemperature) and DIAG (DESAT).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Current | 10 A sink/source at 25 °C - enables fast switching of high-Qg SiC MOSFETs (e.g., 100 nC gate charge in <100 ns) |
| CMTI | ±200 V/ns - ensures robust operation in noisy 1200 V inverter dV/dt environments without false triggering |
| Propagation Delay | 75 ns typ - supports >1 MHz PWM operation with tight timing control across isolated domains |
| VH UVLO Threshold | 13.6 V typ (turn-on), 12.8 V typ (turn-off) - optimized for SiC MOSFET gate drive stability above 12 V |
| DESAT Threshold | 9.00 V typ - calibrated for SiC devices with lower saturation voltage vs. IGBTs (8.55–9.45 V range) |
| Soft Turn-Off Time | 5 µs typ - limits dv/dt during fault to avoid destructive collector overvoltage spikes |
| Isolation Voltage | 5.7 kVRMS (UL 1577) - meets reinforced insulation requirements for 1000 V AC mains-connected systems |
Pinout & Package
STGAP3SXSTR uses a wide-body SO-16W package with reinforced creepage/clearance (8 mm) and CTI ≥ 400 V, certified per IEC 60747-17 and UL 1577.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 8 VL | Negative gate supply | Connects to −10 V rail for bipolar gate drive; clamps GOUT to VL during UVLO/safe state |
| 2 DESAT | Desaturation sense input | Monitors VCE/VDS via external RC network; triggers latchable fault at 9.00 V threshold |
| 3 GNDISO | Floating ground reference | Return path for VH, VL, GOUT, and DESAT; forms isolated power domain boundary |
| 4 SOFTOFF | Soft turn-off current output | Sinks 800 mA to linearly discharge gate during DESAT fault - reduces dv/dt stress |
| 5 VH | Positive gate supply | Drives gate up to +32 V; UVLO protects against insufficient gate drive under brownout |
| 6 GOUT | Gate drive output | 10 A capable buffer; actively clamped to SafeClp (2.0 V) if VH is unpowered |
| 7 CLAMPdrv | Miller clamp pre-driver | Drives external N-MOSFET to short gate-source during high dV/dt; 450 mA sink capability |
| 9, 16 GND | Logic ground | Reference for VDD, IN+, IN−, RST; internal pull-up on IN−/RST, pull-down on IN+ |
| 10 IN+ | Inverting logic input | Active-low gate enable when paired with IN−; enables HW interlock in half-bridge |
| 11 IN− | Non-inverting logic input | Active-high gate enable; internal 90 kΩ pull-up prevents floating-induced turn-on |
| 12 RDY | Power-good diagnostic | Open-drain output low during VDD/VH UVLO or overtemperature - signals system controller |
| 13 DIAG | DESAT fault diagnostic | Open-drain output low within 2.5 µs of DESAT event - latched until RST deasserted |
| 14 RST | Fault reset input | Active-low; clears DIAG latch and resumes operation after fault condition clears |
| 15 VDD | Logic supply | 3.3 V or 5 V input; 2.95 V UVLO threshold ensures reliable digital interface operation |
Key Features
| Feature | Design Value |
|---|---|
| Dual-polarity logic inputs (IN+/IN−) | Enables hardware interlocking in half-bridge configurations - eliminates cross-conduction risk even during MCU firmware faults |
| SiC-optimized DESAT protection | 9.00 V threshold with 200 ns blanking and 150 ns response - matches low VDS,on of SiC MOSFETs while rejecting noise |
| Adjustable soft turn-off | 5 µs typical discharge via SOFTOFF pin - balances fault clearance speed against collector overvoltage in 1200 V systems |
| Reinforced isolation (5.7 kVRMS) | Meets IEC 60747-17 VIOTM = 8 kVPEAK and UL 1577 - certified for use in mains-connected UPS, EV chargers, and industrial drives |
| Miller clamp pre-driver | 450 mA sink capability on CLAMPdrv - drives external MOSFET with minimal loop inductance for EMI-critical hard-switching |
Applications
| Industrial Motor Inverters | EV On-Board Chargers |
|---|---|
|
Use Scenario: 1200 V SiC-based 3-phase inverter for servo drives in CNC machines and robotic arms. IC Role / Device Role / Timing Role: Isolated gate driver providing 10 A peak current, 75 ns timing accuracy, and DESAT fault detection to protect 1200 V SiC modules. Use Value: Enables 100 kHz+ switching with <1% dead-time uncertainty and failsafe shutdown within 150 ns of overcurrent event. |
Use Scenario: Bidirectional AC/DC and DC/DC stages in 11 kW OBCs using SiC MOSFETs. IC Role / Device Role / Timing Role: Gate driver with bipolar voltage support (−10 V/+20 V) and ±200 V/ns CMTI for high-noise PFC and LLC resonant converters. Use Value: Prevents spurious turn-on during 100 V/µs bus transients and ensures clean zero-voltage switching transitions. |
| Induction Heating Systems | Uninterruptible Power Supplies |
|
Use Scenario: 20–100 kHz resonant inverter driving induction coils in commercial kitchen equipment. IC Role / Device Role / Timing Role: High-CMTI isolated driver with soft turn-off for rapid fault clearing during coil detuning or short-circuit events. Use Value: Limits IGBT collector voltage overshoot to <1.2× VCEO during DESAT-triggered shutdown, preserving device SOA. |
Use Scenario: Three-level NPC inverter in 30 kVA online UPS with 1200 V SiC switches. IC Role / Device Role / Timing Role: Dual-input gate driver enabling hardware interlock across phase-leg drivers to prevent shoot-through during grid transients. Use Value: Eliminates need for software-based dead-time management - improves system reliability under brownout/fault conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-voltage isolated gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Si827x (Silicon Labs) | 6 A output, 100 V/ns CMTI, no integrated DESAT or soft turn-off - requires external fault circuitry | Lacks SiC-optimized DESAT threshold and active Miller clamp; suited for cost-sensitive IGBT-only designs | Select only if system already implements discrete DESAT sensing and can tolerate higher layout complexity. |
| UCC5870-Q1 (TI) | 10 A output, 150 V/ns CMTI, integrated DESAT but fixed 7.5 V threshold - not SiC-optimized | Automotive-qualified; lacks adjustable soft turn-off and bipolar VL support - limited for 1200 V SiC systems | Prefer for AEC-Q100 automotive traction inverters where SiC DESAT tuning is unnecessary. |
Compared with STGAP3SXSTR, Si827x requires external components for DESAT and soft turn-off, increasing BOM count and PCB area; UCC5870-Q1 offers automotive qualification but lacks the 9.00 V SiC-specific DESAT threshold and −10 V gate drive needed for optimal 1200 V SiC switching performance.
Availability
STGAP3SXSTR is available at Aetrix Electronics and suitable for industrial motor inverters, EV on-board chargers, and uninterruptible power supplies requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for safety-critical power stages.
Supply support for STGAP3SXSTR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in power management, analog, MEMS, and microcontrollers - with over 40 years of automotive and industrial power IC heritage.
The STGAP3S family targets high-reliability, high-voltage gate driving for SiC and IGBT power modules in industrial automation, renewable energy, and EV infrastructure - emphasizing reinforced isolation, integrated protection, and layout-friendly integration.
FAQ
What is the purpose of the VL pin on STGAP3SXSTR?
The VL pin provides the negative gate supply reference for bipolar gate driving. When connected to −10 V (relative to GNDISO), it enables negative gate turn-off bias to suppress Miller-induced turn-on in SiC MOSFETs during high dV/dt commutation. During UVLO or safe-state conditions, GOUT is actively pulled to VL to ensure reliable switch-off.
How does the DESAT protection differ between STGAP3SXSTR and STGAP3S6STR?
STGAP3SXSTR uses a 9.00 V DESAT threshold optimized for SiC MOSFETs (VDS,on ≈ 3–5 V), while STGAP3S6STR uses 6.00 V for IGBTs (VCE,sat ≈ 1.5–2.5 V). Both share identical 200 ns blanking and 150 ns response, but threshold calibration ensures accurate fault detection without false trips in their respective target devices.
Can STGAP3SXSTR drive both SiC MOSFETs and IGBTs interchangeably?
No - STGAP3SXSTR is specifically configured for SiC MOSFETs, with VH UVLO (13.6 V) and DESAT (9.00 V) thresholds matched to SiC characteristics. Driving IGBTs would risk premature DESAT triggering or insufficient gate drive due to mismatched UVLO levels. Use STGAP3S6STR for IGBTs.
What is the function of the CLAMPdrv pin and how is it used?
CLAMPdrv is a dedicated Miller clamp pre-driver output that sources 280 mA and sinks 450 mA to drive an external low-VGS N-channel MOSFET. It activates during high dV/dt to short the power device's gate to source, preventing spurious turn-on. Layout best practice requires placing the clamp MOSFET within 5 mm of the main switch gate terminal.
STGAP3SXSTR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- *
- Package/Case:
- -
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- -
- Driven Configuration:
- -
- Channel Type:
- -
- Number of Drivers:
- -
- Gate Type:
- -
- Voltage - Supply:
- -
- Logic Voltage - VIL, VIH:
- -
- Current - Peak Output (Source, Sink):
- -
- Input Type:
- -
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
STGAP3SXSTR FAQ
1.How can I place an order for STGAP3SXSTR through Aetrix?
Please submit a Request for Quotation (RFQ) for STGAP3SXSTR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STGAP3SXSTR reliable?
The price and inventory of STGAP3SXSTR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STGAP3SXSTR is usually 5 days.
3.What payment methods are accepted for STGAP3SXSTR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STGAP3SXSTR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STGAP3SXSTR?
STGAP3SXSTR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STGAP3SXSTR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STGAP3SXSTR?
For technical support, including STGAP3SXSTR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STGAP3SXSTR requirements.
6.How does Aetrix verify that STGAP3SXSTR is sourced from the original manufacturer or authorized distributors?
All STGAP3SXSTR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STGAP3SXSTR meets industry standards.
7.What is the process for return or replacement of STGAP3SXSTR?
All STGAP3SXSTR units undergo pre-shipment inspection (PSI). If there is an issue with STGAP3SXSTR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STGAP3SXSTR part is unused and in its original packaging.
Return procedure for STGAP3SXSTR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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