STMicroelectronics STLD1
- Part No.:
- STLD1
- Manufacturer:
- STMicroelectronics
- Category:
- Power Management - Specialized
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
STLD1.pdf
- Description:
- POWER-LINE COMMUNICATION DUAL LI
- Quantity:
- Payment:

- Shipping:

Inventory:1,673
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Product details
Overview
STLD1 from STMicroelectronics is a dual-channel, high-current line driver IC designed for narrow-band power-line communication (PLC) systems. It delivers up to 1.5 ARMS output current and supports 18 Vp-p single-ended or 36 Vp-p differential output swing on an 8–18 V single supply, with integrated thermal shutdown, current sense feedback (CSF_OUT), and configurable amplifier topology. It is deployed in smart metering and grid infrastructure where EMC compliance with CENELEC/FCC/ARIB is mandatory.
For engineers reviewing the STLD1 datasheet, STLD1 pinout, STLD1 application, or STLD1 equivalent, this page provides verified electrical parameters, thermal protection thresholds, IM3/SFDR performance data, QFN24 package layout, and real-world PLC system integration guidance - all aligned with DS12339 Rev 2 (June 2018).
Technical Context
The STLD1 integrates two fully independent Class-AB power amplifiers with externally configurable gain and bias, each featuring active enable (TX_ON_1/TX_ON_2), differential input pairs (PA1_INP/INN, PA2_INP/INN), and low-impedance outputs (0.1 Ω typical). Its internal 5 V linear regulator (AVDD_5V) powers analog circuitry while sharing PVCC/VCC supply rails.
Thermal management uses a four-level current-mode THERM output proportional to junction temperature (TJ = 70 °C to 170 °C), and current sensing via CSF_OUT provides real-time output current monitoring at 106 A/A ratio. The device achieves -72 dBc in-band IM3 and 71 dBc SFDR at 50–80 kHz under 24 Vp-p differential load conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output current | 1.5 ARMS max - drives 5–100 Ω AC power-line loads without external boost stages |
| Output voltage swing | 18 Vp-p SE / 36 Vp-p diff - meets CENELEC A/B band amplitude requirements |
| In-band IM3 | -72 dBc @ 50/80 kHz - ensures spectral purity for multi-tone PLC signaling |
| SFDR | 71 dBc @ 50/80 kHz - enables reliable demodulation in noisy grid environments |
| Thermal shutdown thresholds | Four-level THERM current scaling (0× to 4× IBIAS_IN) at 70/100/125/170 °C - supports graded fault response |
| Current sense ratio | 106 A/A (CSF_OUT : PA_OUT) - allows precise current limiting with <1% external resistor tolerance |
| Supply range | 8–18 V single rail - eliminates need for dual-supply design in PLC front-ends |
Pinout & Package
STLD1 is housed in a thermally enhanced QFN24L (4 × 4 × 1 mm) package with exposed thermal pad connected to AGND. The 24-pin layout supports dual amplifier routing, independent enable control, and dedicated current/thermal feedback paths.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 6, 25 | PGND / Exposed pad | Power amplifier ground reference and primary thermal conduction path to PCB ground plane |
| 2, 4 | PA2_OUT / PA1_OUT | Differential-capable output terminals - each capable of 1.5 ARMS into 5–100 Ω loads |
| 7, 24 | PVCC | Main 8–18 V power supply input for both amplifiers - must be decoupled with ≥10 μF near pin |
| 8 | VCC | Analog supply input - externally shorted to PVCC to power internal 5 V regulator and bias circuitry |
| 10 | CSF_OUT | Current-proportional feedback output (106 A/A) - used for overcurrent detection and closed-loop regulation |
| 13–16 | PA1/2_INP/INN | Differential input pairs - accept ±11 V common-mode range and support external gain-setting networks |
| 20 | THERM | Temperature-scaled current output (0–4× IBIAS_IN) - enables programmable thermal throttling |
| 22–23 | TX_ON_2 / TX_ON_1 | Active-high enable inputs - force Hi-Z (≈30 kΩ) output state when low for power-gating |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent amplifiers | Each channel fully configurable for SE/diff operation, with separate enable and input pairs - enables flexible PHY layer architecture |
| Ultra-low output impedance | 0.1 Ω typical - minimizes voltage drop across 5–100 Ω PLC line impedances for efficient power transfer |
| EMC-optimized linearity | -76 dBc HD3 and -70 dB THD - meets strict out-of-band emission limits per CENELEC EN 50065-1 |
| Integrated thermal protection | Four-stage THERM current scaling (70–170 °C) - allows system-level thermal policy implementation without external sensors |
| Current sense accuracy | 106 A/A ratio with <±3% variation - enables robust overcurrent protection using standard 1% resistors |
Applications
| Smart Meter Transmitter | Grid Communication Node |
|---|---|
|
Use Scenario: Bidirectional PLC signal transmission from electricity meter to data concentrator over live 230 VAC mains. IC Role / Device Role / Timing Role: Dual-channel line driver delivering modulated carrier signals (e.g., PRIME or G3-PLC) onto distribution lines. Use Value: 36 Vp-p differential swing ensures >10 dB SNR margin at 100 m cable length; embedded thermal protection prevents latch-up during transformer-coupled surge events. |
Use Scenario: Medium-voltage substation node relaying control commands and telemetry across radial feeders. IC Role / Device Role / Timing Role: High-reliability PLC front-end amplifier supporting CENELEC A-band (3–95 kHz) with adaptive gain control. Use Value: -72 dBc in-band IM3 enables simultaneous multi-node communication without intermodulation crosstalk; QFN24 thermal pad sustains 2.3 W dissipation at 70 °C ambient. |
| Home Energy Gateway | Streetlight Controller PLC |
|
Use Scenario: Residential gateway bridging Zigbee/Wi-Fi to legacy power-line infrastructure for load monitoring. IC Role / Device Role / Timing Role: Single-amplifier mode line driver for FCC-compliant 100–500 kHz BPSK signaling in North American grids. Use Value: 18 Vp-p SE output meets FCC Part 15.209 field strength limits; CSF_OUT enables real-time current profiling for anomaly detection. |
Use Scenario: Outdoor LED streetlight cluster coordinating dimming schedules and fault reporting via ARIB-compliant PLC. IC Role / Device Role / Timing Role: Robust line driver operating across -40 °C to +105 °C ambient with automatic thermal derating. Use Value: Four-level THERM output permits staged power reduction before shutdown; RSV pins allow future feature expansion without PCB redesign. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel PLC line driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TI TSS1082 | Single 5 V supply only; 1.2 ARMS max; no integrated thermal sensor current output | Requires external level-shifting for 8–18 V PLC bus; lacks graded thermal response | Prefer for low-voltage, cost-sensitive designs where full 18 V swing is not required |
| Analog Devices ADF7023 + ADL5562 | Discrete RF transceiver + external driver; 2.0 ARMS possible but requires 3+ ICs and layout optimization | Supports wideband OFDM but adds complexity for narrowband CENELEC compliance | Choose when migrating to G3-PLC full PHY stack with software-defined modulation |
Compared with TI TSS1082 and ADF7023+ADL5562, STLD1 uniquely integrates dual amplifiers, 8–18 V operation, graded thermal feedback, and EMC-optimized linearity in one QFN24 package - reducing BOM count by 3× and eliminating discrete thermal/current sensing components.
Availability
STLD1 is available at Aetrix Electronics and suitable for smart metering, grid communication nodes, and home energy gateways requiring stable component supply across industrial temperature ranges and long-life deployments.
Supply support for STLD1 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in automotive, industrial, and power-management ICs with strong IP in analog, mixed-signal, and embedded processing.
The STLD1 belongs to ST's Power Line Communication (PLC) Analog Front-End product line, engineered specifically for high-efficiency, EMC-compliant narrowband signal injection onto AC mains - targeting utility-grade reliability and regulatory certification readiness.
FAQ
What is the minimum recommended bypass capacitance for AVDD_5V?
A minimum 10 μF ceramic capacitor must be placed between AVDD_5V and AGND, as specified in DS12339 page 3. This value ensures stable regulation under dynamic load conditions and suppresses switching noise from the internal 5 V LDO, preventing gain instability in the amplifier stages.
Can STLD1 operate in single-ended mode with only one amplifier enabled?
Yes - STLD1 supports independent channel enable via TX_ON_1 and TX_ON_2. When TX_ON_2 is held low, PA2_OUT enters Hi-Z (≈30 kΩ), allowing PA1_OUT to drive single-ended loads up to 18 Vp-p while maintaining full current capability (1.5 ARMS) and thermal protection.
How is the CSF_OUT current related to actual output current?
CSF_OUT delivers a current exactly 106 times the instantaneous PA_OUT current (ICSF = 106 × IPA_OUT). This fixed-ratio relationship enables accurate current limiting using a simple external sense resistor and comparator, with no calibration required across temperature or supply voltage.
What is the purpose of the RSV0–RSV3 pins?
RSV0, RSV1, RSV2, and RSV3 are reserved pins defined in DS12339: RSV0 and RSV2/RSV3 must be tied to AGND; RSV1 must remain floating. These pins provide future test or configuration functionality and have no effect on current STLD1 operation - incorrect connection may impair thermal performance or ESD immunity.
STLD1 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Applications:
- Power Line Communications
- Current - Supply:
- 560µA
- Voltage - Supply:
- 8V ~ 18V
- Operating Temperature:
- -40°C ~ 105°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-QFN (4x4)
STLD1 FAQ
1.How can I place an order for STLD1 through Aetrix?
Please submit a Request for Quotation (RFQ) for STLD1 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STLD1 reliable?
The price and inventory of STLD1 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STLD1 is usually 5 days.
3.What payment methods are accepted for STLD1?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STLD1 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STLD1?
STLD1 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STLD1 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STLD1?
For technical support, including STLD1 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STLD1 requirements.
6.How does Aetrix verify that STLD1 is sourced from the original manufacturer or authorized distributors?
All STLD1 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STLD1 meets industry standards.
7.What is the process for return or replacement of STLD1?
All STLD1 units undergo pre-shipment inspection (PSI). If there is an issue with STLD1, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STLD1 part is unused and in its original packaging.
Return procedure for STLD1:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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