STMicroelectronics STLD1TR
- Part No.:
- STLD1TR
- Manufacturer:
- STMicroelectronics
- Category:
- Power Management - Specialized
- Package:
- 24-VFQFN Exposed Pad
- Datasheet:
-
STLD1TR.pdf
- Description:
- POWER-LINE COMMUNICATION DUAL LI
- Quantity:
- Payment:

- Shipping:

Inventory:18,803
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
STLD1TR from STMicroelectronics is a dual-channel, high-current line driver IC designed for narrow-band power-line communication (PLC) systems. It delivers up to 1.5 ARMS output current, supports 8–18 V single-supply operation, provides 18 Vp-p single-ended / 36 Vp-p differential output swing, and features embedded thermal shutdown and current sense feedback - enabling robust signal injection into 5–100 Ω AC mains loads in smart metering and grid-edge IoT nodes.
For engineers reviewing the STLD1TR datasheet, STLD1TR pinout, STLD1TR application, or STLD1TR equivalent, key selection considerations include its dual-amplifier topology with independent enable control (TX_ON_1/TX_ON_2), low 0.1 Ω typical output impedance, -72 dBc in-band IM3 at 50/80 kHz, SFDR ≥69 dBc, and QFN24 (4×4 mm) package with exposed thermal pad.
Technical Context
The STLD1TR integrates two fully independent, rail-to-rail capable Class-AB power amplifiers with externally configurable gain and bias via PAx_INP/INN inputs. Each amplifier features active Hi-Z disable (via TX_ON_x), current-sense output (CSF_OUT) with 106 A/A ratio, and thermal monitoring via proportional THERM current output scaled to IBIAS_IN.
Its internal 5 V linear regulator (AVDD_5V) powers analog circuitry from the same 8–18 V PVCC/VCC supply, eliminating need for external LDOs. The device achieves <0.1 Ω output impedance in RX mode and maintains <−70 dB THD across 50–500 kHz while meeting CENELEC A/B, FCC Part 15, and ARIB STD-T108 emission limits through ultra-low harmonic distortion and spurious-free dynamic range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply voltage | 8–18 V single supply - enables direct connection to PLC system DC bus without intermediate regulation |
| Max output current | 1.5 ARMS - sufficient to drive 5 Ω–100 Ω PLC coupler impedances under CENELEC-compliant line conditions |
| Output swing | 18 Vp-p SE / 36 Vp-p diff - meets peak voltage requirements for G3-PLC and PRIME physical layers |
| In-band IM3 | −72 dBc @ 50/80 kHz - ensures compliance with CENELEC EN 50065 spectral mask for narrowband PLC |
| SFDR | 69 dBc @ 50/80 kHz - guarantees clean signal transmission in noisy grid environments with minimal out-of-band emissions |
| Thermal thresholds | 70 °C / 100 °C / 125 °C / 170 °C - four-level junction temperature sensing enables graded thermal response before shutdown |
| Output impedance | 0.1 Ω typical in RX mode - minimizes power loss and improves matching to low-Z PLC coupling networks |
Pinout & Package
STLD1TR is housed in a thermally enhanced QFN24L (4 × 4 × 1 mm) package with an exposed thermal pad that must be connected to AGND on the PCB for optimal thermal performance and EMI suppression.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PA1_OUT, PA2_OUT | Dual power amplifier outputs | Drive AC mains via coupling transformers or capacitors; support both single-ended and differential configurations |
| TX_ON_1, TX_ON_2 | Independent amplifier enable inputs | Active-high logic control; force low to place respective output in ~30 kΩ Hi-Z state for channel isolation |
| CSF_OUT | Current sense feedback output | 106× proportional current mirror of PA output current - used for overcurrent protection and closed-loop control |
| THERM | Thermal feedback current output | 0× to 4× IBIAS_IN current scaling across 4 junction temperature thresholds - enables programmable thermal management |
| PA1_INP/INN, PA2_INP/INN | Differential input pairs | Accept baseband PLC signals; bias set externally to PVCC/2 for rail-to-rail operation |
| PGND, AGND | Power and analog ground terminals | Must be shorted externally on PCB - separation prevents noise coupling between high-current PA and sensitive analog blocks |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent amplifiers | Each with dedicated enable (TX_ON_x), allowing asymmetric channel activation for time-division multiplexing or redundancy |
| Programmable thermal response | Four-level junction temperature reporting via THERM current scaling - supports adaptive power backoff before shutdown |
| Low-distortion output stage | −76 dBc HD3 and −70 dB THD ensure spectral purity required for regulatory compliance in CENELEC/FCC/ARIB bands |
| Integrated 5 V regulator | AVDD_5V output supplies internal analog circuitry - eliminates need for external LDO and reduces BOM count |
| Current-sense accuracy | CSF_OUT provides 106 A/A current mirroring with <±5% error - enables precise overcurrent detection without shunt resistors |
Applications
| Smart Meter Transmitter | G3-PLC Node |
|---|---|
|
Use Scenario: Bidirectional data transmission over 230 V AC mains in residential electricity meters compliant with IEC 62056-6-5 and DLMS/COSEM. IC Role / Device Role / Timing Role: Dual-channel line driver injecting modulated OFDM symbols into phase-coupled power lines using differential configuration. Use Value: 36 Vp-p differential swing and −72 dBc IM3 meet G3-PLC spectral mask requirements while driving 50 Ω coupler impedance. |
Use Scenario: Grid-edge IoT node implementing G3-PLC PHY layer for remote firmware updates and load profiling in distribution substations. IC Role / Device Role / Timing Role: High-current amplifier delivering clean 100–500 kHz band-limited signals into high-noise MV/LV transformer secondary windings. Use Value: 69 dBc SFDR and 0.1 Ω output impedance minimize intermodulation distortion and insertion loss in multi-tap PLC networks. |
| PRIME Protocol Gateway | ARIB-Compliant Streetlight Controller |
|
Use Scenario: PRIME v1.4 protocol gateway aggregating data from 100+ streetlights and sensors across Japanese low-voltage grids. IC Role / Device Role / Timing Role: Single-ended line driver operating at 42–89 kHz band with programmable gain and thermal foldback. Use Value: −74 dBc in-band IM3 and 1.5 ARMS current ensure reliable packet delivery under varying grid impedance (5–100 Ω). |
Use Scenario: Outdoor LED streetlight controller transmitting telemetry and receiving commands via ARIB STD-T108 narrowband PLC in Japan. IC Role / Device Role / Timing Role: Differential line driver configured for 148.5–151.5 kHz band with external LC filter interface. Use Value: Four-level thermal reporting (THERM) enables predictive derating during summer ambient conditions (>85 °C enclosure temp). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel PLC line driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TI TSS721A | Single-channel, 1.2 ARMS max, no integrated 5 V regulator, requires external bias network | Limited to simplex PLC transceivers; lacks dual-amplifier flexibility and thermal grading | Choose when cost-sensitive single-channel designs dominate and external LDO is acceptable |
| Analog Devices ADF7023 + ADL5562 | RF transceiver + discrete RF amplifier; higher integration but no embedded thermal/current sensing | Requires full RF front-end design; not pre-validated for CENELEC/FCC PLC spectral masks | Prefer for wideband PLC or hybrid RF/PLC gateways where frequency agility outweighs certification effort |
Compared with TI TSS721A and ADF7023+ADL5562, STLD1TR uniquely combines dual-channel independence, integrated thermal/current feedback, and regulatory-ready distortion performance in a single QFN24 package - reducing design risk and validation time for certified narrowband PLC endpoints.
Availability
STLD1TR is available at Aetrix Electronics and suitable for smart metering, grid-edge IoT nodes, and PRIME/G3-PLC gateways requiring stable component supply across extended industrial temperature ranges (−40 °C to +105 °C) and long product lifecycles.
Supply support for STLD1TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, specializing in automotive, industrial, and power management ICs with strong emphasis on embedded systems and connectivity solutions.
The STLD1TR belongs to ST's Power Line Communication (PLC) Interface portfolio, engineered specifically to simplify certified narrowband PLC transmitter design by integrating high-current drivers, thermal intelligence, and regulatory-compliant linearity in one device.
FAQ
What is the recommended PCB layout practice for the exposed thermal pad on STLD1TR?
The exposed pad (Pin 25) must be soldered to a solid AGND copper plane with ≥4 thermal vias (0.3 mm diameter) connecting to inner-layer ground planes. Avoid splitting the pad or routing signals underneath it. This ensures ≤35 °C/W junction-to-ambient thermal resistance and prevents thermal shutdown during sustained 1.5 ARMS operation.
Can STLD1TR operate in single-ended mode while disabling one amplifier?
Yes. Drive only PA1_OUT with PA2_OUT disabled by holding TX_ON_2 low (≤0.95 V). PA2_OUT enters ~30 kΩ Hi-Z state, isolating it from the load. The remaining amplifier maintains full 1.5 ARMS capability and all specifications - confirmed in DS12339 Rev 2, Table 5 (Tx mode, single PA configuration).
How is the CSF_OUT current used for overcurrent protection?
CSF_OUT delivers a current equal to 106× the PA output current. Connect a precision resistor (e.g., 10 Ω) from CSF_OUT to AGND to generate a voltage proportional to load current. Feed this voltage to a comparator referenced to 159 mV to detect >1.5 ARMS - matching the absolute maximum rating in Table 2.
Does STLD1TR support automatic thermal foldback without external circuitry?
No. While THERM provides four-level current-scaled feedback (0× to 4× IBIAS_IN), external logic (e.g., microcontroller ADC or comparator) is required to interpret levels and reduce TX_ON duty cycle or lower signal amplitude. The IC self-disables only at Tj > 170 °C (T4 threshold), per Section 5.1.
STLD1TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 24-VFQFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Applications:
- Power Line Communications
- Current - Supply:
- 560µA
- Voltage - Supply:
- 8V ~ 18V
- Operating Temperature:
- -40°C ~ 105°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-QFN (4x4)
STLD1TR FAQ
1.How can I place an order for STLD1TR through Aetrix?
Please submit a Request for Quotation (RFQ) for STLD1TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STLD1TR reliable?
The price and inventory of STLD1TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STLD1TR is usually 5 days.
3.What payment methods are accepted for STLD1TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STLD1TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STLD1TR?
STLD1TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STLD1TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STLD1TR?
For technical support, including STLD1TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STLD1TR requirements.
6.How does Aetrix verify that STLD1TR is sourced from the original manufacturer or authorized distributors?
All STLD1TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STLD1TR meets industry standards.
7.What is the process for return or replacement of STLD1TR?
All STLD1TR units undergo pre-shipment inspection (PSI). If there is an issue with STLD1TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STLD1TR part is unused and in its original packaging.
Return procedure for STLD1TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
STLD1TR Tags

-
TPS2511DGNR
Texas Instruments

-
UTC2000/MG
Microchip Technology

-
TUSB320HAIRWBR
Texas Instruments

-
TPS61252DSGR
Texas Instruments

-
PI5USB30216CXUAEX
Diodes Incorporated
-
SN6501DBVR
Texas Instruments

-
CYPD3177-24LQXQT
Infineon Technologies
-
SN6501QDBVRQ1
Texas Instruments

-
STUSB1600AQTR
STMicroelectronics

-
SN6505BDBVR
Texas Instruments
-
SN6501DBVT
Texas Instruments

-
TPS65150PWPR
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
