STMicroelectronics STNRGPF12TR
- Part No.:
- STNRGPF12TR
- Manufacturer:
- STMicroelectronics
- Category:
- Power Management - Specialized
- Package:
- 38-TFSOP (0.173", 4.40mm Width)
- Datasheet:
-
STNRGPF12TR.pdf
- Description:
- TWO-CHANNEL INTERLEAVED CCM PF
- Quantity:
- Payment:

- Shipping:

Inventory:988
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Product details
Overview
STNRGPF12TR from STMicroelectronics is a two-channel interleaved continuous conduction mode (CCM) digital PFC controller with integrated silicon-controlled rectifier (SCR)-based inrush current limiting, fixed-frequency average current mode control, and UART-based firmware customization. It drives dual boost channels up to 105 °C ambient, supports phase-shedding and soft-start, and targets high-power industrial AC-DC conversion.
For engineers reviewing the STNRGPF12TR datasheet, STNRGPF12TR pinout, STNRGPF12TR application, or STNRGPF12TR equivalent, key selection criteria include its dual-channel interleaved CCM architecture, embedded 15-year ECC memory retention, SCR-driven inrush control (vs. relay-based STNRGPF02), and eDesignSuite-supported schematic + firmware generation.
Technical Context
The STNRGPF12TR implements a mixed-signal (analog/digital) architecture where analog comparators (OCP[0], OCP[1], TRIANG REF, OUT_PI[2/3]) interface with external current/voltage sensing circuits, while digital logic manages PWM timing, phase synchronization (SYNCR, SET_I), and fault sequencing (PFC_FAULT, PFC_OK). Its semi-digital design separates real-time analog loop execution from programmable digital supervision.
It operates at fixed switching frequency with average current mode control across two interleaved boost channels, using SIN_REF for sinusoidal current reference generation, CLOCK for triangular waveform synthesis, and OFFSET for op-amp offset compensation-enabling precise RMS input voltage (VIN pins), output voltage (VOUT), output current (IOUT), and channel current (ICH[0]/ICH[1]) measurement.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Topology Support | Two-channel interleaved boost PFC in continuous conduction mode (CCM) |
| Control Mode | Fixed-frequency average current mode with digital supervision and analog PI loop execution |
| Inrush Limiting | Digital solid-state implementation via SCR[0]/SCR[1] PWM outputs (no mechanical relay required) |
| Operating Temp | –40 °C to +105 °C ambient, qualified for industrial-grade reliability |
| Firmware Storage | Embedded non-volatile memory with 15-year data retention and ECC error correction |
| Communication | UART interface (PTX/PRX pins) supporting bootloader updates and GUI-based configuration |
| Fault Protection | Dedicated hardware-level OCP (OCP[0], OCP[1]), thermal monitoring (TEMP), and PFC_FAULT/PFC_OK status signaling |
Pinout & Package
STNRGPF12TR is housed in a 38-pin VFQFPN package (7 × 7 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are validated per STMicroelectronics DB3771 Rev 1 (Nov 2018).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| PWM[0], PWM[1] | Output driver signals | Generate gate-drive PWM for CH0 and CH1 boost MOSFETs with precise interleaving timing |
| SCR[0], SCR[1] | Digital inrush control outputs | Drive external SCRs to limit inrush current during AC startup-replaces relay/resistor solution |
| SIN_REF, CLOCK, OFFSET | Analog reference & timing generators | Produce filtered sinusoidal current reference, triangle waveform clock, and op-amp offset compensation for stable current loop |
| VIN, VOUT, IOUT, ICH[0], ICH[1] | Analog measurement inputs | Interface directly with resistor dividers and current sense amplifiers for RMS input voltage, output voltage/current, and per-channel current monitoring |
| PFC_FAULT, PFC_OK, OCP | Status and protection outputs | Open-drain signals indicating system fault, ready-for-load state, and instantaneous overcurrent events for safety interlocking |
Key Features
| Feature | Design Value |
|---|---|
| Dual-channel interleaving | Reduces input/output ripple by 50% and enables higher power density vs. single-channel PFC |
| Phase-shedding function | Disables one channel under light load to maintain >90% efficiency down to 20% rated power |
| eDesignSuite integration | Generates complete schematic, BOM, and downloadable binary firmware-no manual register programming required |
| ZVD detection (ZVD pin) | Enables zero-voltage switching timing alignment with AC line zero-crossing for reduced EMI and switching loss |
| Embedded ECC memory | Ensures firmware and calibration data integrity over 15 years without external backup or refresh circuitry |
Applications
| Welding Power Supplies | Industrial Motor Drives |
|---|---|
Use Scenario: High-current DC bus generation for IGBT gate drivers and auxiliary supplies in arc welding inverters. IC Role / Device Role / Timing Role: Dual-channel interleaved PFC controller managing 3–6 kW input stage with ZVD-aligned switching to minimize EMI during arc ignition. Use Value: Enables compact heatsink design via ripple cancellation and maintains >96% efficiency across 30–100% load range with phase-shedding. | Use Scenario: Front-end AC-DC conversion for variable-frequency drives powering HVAC compressors and conveyor motors. IC Role / Device Role / Timing Role: Digital PFC supervisor coordinating boost stage timing with downstream inverter control via synchronized CLOCK and SYNCR signals. Use Value: Eliminates need for external inrush relay, reduces component count by 4 parts, and supports 105 °C ambient operation in enclosed drive cabinets. |
| Uninterruptible Power Supplies (UPS) | Battery Charging Systems |
Use Scenario: Bi-directional AC-DC/DC-AC front-end in online double-conversion UPS systems requiring fast transient response. IC Role / Device Role / Timing Role: Interleaved PFC controller delivering regulated 400 V DC bus with soft-start and seamless transfer between utility/battery modes. Use Value: PFC_FAULT and PFC_OK pins enable direct interlock with battery inverter stage for fail-safe switchover within <10 ms. | Use Scenario: High-efficiency AC-DC conversion for EVSE Level 2 chargers and telecom rectifiers with dynamic load profiles. IC Role / Device Role / Timing Role: Programmable PFC controller adapting to varying grid conditions (90–264 VAC) and load steps via UART-configurable parameters. Use Value: Firmware customization allows tuning of current loop bandwidth and inrush ramp rate to meet UL 1741 SA anti-islanding requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel interleaved PFC controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| STNRGPF02TR | Relay-based inrush limiting (mechanical), no SCR[0]/SCR[1] outputs; identical pinout and firmware interface | Preferred where cost sensitivity outweighs lifetime/reliability concerns in non-critical industrial equipment | Select STNRGPF02TR only if mechanical inrush solution is already validated and SCR gate drive layout is not feasible |
| UCC28070DWR | Analog CCM controller with no embedded firmware, no UART, no phase-shedding; requires external op-amps and discrete logic | Suitable for legacy designs needing analog-only control or where digital firmware update capability is unnecessary | Choose UCC28070DWR when avoiding MCU-like qualification, long-term firmware maintenance, or GUI tool dependency |
Compared with STNRGPF02TR, STNRGPF12TR replaces electromechanical inrush components with solid-state control and adds phase-shedding; versus UCC28070DWR, it integrates firmware, memory, and GUI toolchain-reducing design time by ~6 weeks but requiring UART programming infrastructure.
Availability
STNRGPF12TR is available at Aetrix Electronics and suitable for welding power supplies, industrial motor drives, and uninterruptible power supplies requiring stable component supply, long-lifecycle support, and production-ready PFC firmware.
Supply support for STNRGPF12TR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power ICs, sensors, and analog devices for industrial, automotive, and consumer markets.
The STNRGPF12TR belongs to ST's STNRG digital power controller family, engineered specifically for high-efficiency, high-reliability interleaved PFC in industrial AC-DC systems demanding programmability, thermal robustness, and rapid design turnaround.
FAQ
What firmware development tools are required for STNRGPF12TR?
ST's eDesignSuite software is mandatory-it generates the full schematic, BOM, and binary firmware image (.hex) based on user-defined input/output specifications. No standalone IDE or C coding is needed; configuration occurs via GUI-driven parameter entry and simulation validation before download via UART.
Does STNRGPF12TR support discontinuous conduction mode (DCM)?
No. The STNRGPF12TR is designed exclusively for continuous conduction mode (CCM) operation in interleaved boost topologies. It does not implement DCM or transition-mode (TM) control algorithms, and its internal compensators, PWM timing, and protection logic are optimized for fixed-frequency CCM only.
How is ZVD (zero-voltage detection) implemented on STNRGPF12TR?
ZVD is implemented via the dedicated ZVD pin, which accepts a square-wave signal synchronized to AC line zero-crossing. The controller uses the rising edge of that signal to align PWM edges and trigger internal timing events-enabling precise zero-voltage switching without external comparators or delay circuits.
Can STNRGPF12TR operate with only one PFC channel enabled?
Yes. The device supports single-channel operation via firmware configuration. When CH1 is disabled, PWM[1], SCR[1], and ICH[1] functions are inactive, and phase-shedding logic automatically routes full load to CH0 while maintaining CCM regulation and all protections-including OCP[0], thermal monitoring, and PFC_FAULT signaling.
STNRGPF12TR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- STMicroelectronics
- Series:
- -
- Package/Case:
- 38-TFSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Applications:
- Digital Power Controller
- Current - Supply:
- -
- Voltage - Supply:
- -
- Operating Temperature:
- -40°C ~ 105°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 38-TSSOP
STNRGPF12TR FAQ
1.How can I place an order for STNRGPF12TR through Aetrix?
Please submit a Request for Quotation (RFQ) for STNRGPF12TR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for STNRGPF12TR reliable?
The price and inventory of STNRGPF12TR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STNRGPF12TR is usually 5 days.
3.What payment methods are accepted for STNRGPF12TR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STNRGPF12TR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for STNRGPF12TR?
STNRGPF12TR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your STNRGPF12TR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for STNRGPF12TR?
For technical support, including STNRGPF12TR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STNRGPF12TR requirements.
6.How does Aetrix verify that STNRGPF12TR is sourced from the original manufacturer or authorized distributors?
All STNRGPF12TR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STNRGPF12TR meets industry standards.
7.What is the process for return or replacement of STNRGPF12TR?
All STNRGPF12TR units undergo pre-shipment inspection (PSI). If there is an issue with STNRGPF12TR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The STNRGPF12TR part is unused and in its original packaging.
Return procedure for STNRGPF12TR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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