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Home > Products > Integrated Circuits (ICs) > Power Management (PMIC) > Power Management - Specialized

STMicroelectronics STPMIC1DPQR

Name: STPMIC1DPQR
Brand: STMicroelectronics
SKU: STPMIC1DPQR
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: STPMIC1DPQR

Manufacturer:: STMicroelectronics

Category:: Power Management - Specialized

Package:: 44-WFQFN Exposed Pad

Datasheet:: STPMIC1DPQR.pdf

Description:: 14 OUTPUT RAILS PMIC 4 ADJUSTABL

Quantity:: RFQ Add To RFQ list

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Product details

Overview

STPMIC1DPQR from STMicroelectronics is a highly integrated power management IC (PMIC) designed as a companion chip for the STM32MP1 microprocessor unit. It delivers 4 adaptive COT buck converters (1.2 V, 1.1 V, 3.3 V, 1.2 V), 4 programmable LDOs, DDR3 termination LDO (sink-source/bypass), USB PHY LDO with auto-source detection, and a 5.2 V/1.1 A boost converter - all in a WFQFN-44 package. It powers core, DDR, USB, and peripheral rails in portable embedded systems.

For engineers reviewing the STPMIC1DPQR datasheet, STPMIC1DPQR pinout, STPMIC1DPQR application, or STPMIC1DPQR equivalent, this device supports I²C-configurable power sequencing (Ranks 0–3), NVM-programmable default voltages, and advanced low-power modes (OFF/STANDBY/STOP/RUN) with sub-100 µA quiescent current in OFF state - critical for battery-constrained IoT and wearable designs.

Technical Context

The STPMIC1DPQR implements an adaptive constant-on-time (COT) control architecture across its four buck converters, enabling fast transient response and seamless PFM-to-PWM mode transition for high efficiency (up to 90%) across load ranges. Its integrated PLL synchronizes switching frequencies to reduce EMI, while the NVM stores per-rail startup rank, voltage, protection thresholds, and I²C slave address.

It integrates dedicated circuitry for DDR memory support: REFDDR outputs VOUT2/2 (0.55 V typical) with ±1% accuracy; LDO3 operates in normal (1.8 V), sink-source (for DDR3 VTT), or bypass modes; and the boost converter supplies VBUS_OTG and dual 500 mA USB host ports with automatic input source detection between battery and 5 V adapter.

Key Specifications

Parameter	Value and Actual Design Meaning
Input Voltage Range	2.8 V to 5.5 V - supports single-cell Li-ion, USB-C PD, and legacy 5 V adapters without external regulation.
Buck Converters	4 × adaptive COT SMPS - BUCK1 (1.2 V/2 A), BUCK2 (1.1 V/2 A), BUCK3 (3.3 V/2 A), BUCK4 (1.2 V/2 A); each with independent enable, soft-start, and overcurrent protection.
LDO Outputs	6 total: LDO1–LDO4 (adjustable), LDO5 (USB PHY), LDO6 (general purpose); plus REFDDR (0.55 V, ±1% accuracy) and LDO3 with sink-source/bypass capability for DDR3 termination.
Boost Converter	5.2 V / 1.1 A - powers up to three USB ports (two 500 mA host + one 100 mA OTG); includes bypass mode for direct 5 V input routing to minimize losses.
Power Switches	Two 500 mA switches: PWR_USB_SW (USB OTG compliant) and PWR_SW (500/1000 mA configurable); both with OCP turn-off delay of 30 ms.
Control Interface	I²C (standard/fast-mode) + 4 digital IOs (WAKEUP, PONKEYn, INTn, PWRCTRL) - enables full configuration, monitoring, and sequenced power-up/down via host processor.
Package & Thermal	WFQFN-44 (5 mm × 6 mm × 0.8 mm), ePad grounded; θ_JA = 29 °C/W on JEDEC 2s2p board; rated for –40 °C to +105 °C ambient operation.

Pinout & Package

STPMIC1DPQR is housed in a thermally enhanced WFQFN-44L package (5 mm × 6 mm × 0.8 mm) with exposed thermal pad (EPGND) requiring solder connection to PCB ground plane for optimal thermal performance and EMI suppression.

Pin	Circuit Role	Design Meaning
RSTn	Digital I/O reset	Active-low bidirectional reset line with internal pull-up; asserts system-wide reset on falling edge and signals ready on rising edge after internal initialization.
WAKEUP	Digital input	Active-high wake signal from host processor; initiates power-up sequence when STPMIC1 is in OFF or STANDBY mode.
SDA / SCL	I²C interface	Standard two-wire serial bus for configuring registers, reading status, programming NVM, and updating rail voltages or sequencing ranks.
VOUT1–VOUT4	Analog feedback inputs	Resistor-divider sense points for buck converters - used to set output voltage and monitor regulation stability; require external resistors per target VOUT.
VLX1–VLX4 / VLXBST	Switch node outputs	High-frequency switching nodes connecting to external inductors; must be routed with minimal loop area and adjacent to PGND pins to limit EMI and voltage spikes.
BUCKxIN / VIN / SWIN	Main power inputs	BUCK1IN–BUCK4IN must be tied directly to VIN (2.8–5.5 V); SWIN feeds the 500 mA power switches; all share common input path for simplified layout.
LDOxOUT / REFDDR / BSTOUT	Regulated outputs	LDO1–LDO6, REFDDR (0.55 V), and BSTOUT (5.2 V) are low-noise, current-limited outputs; REFDDR is precision-trimmed to half BUCK2 output for DDR reference compliance.
PGNDx / AGND / GNDLDO / EPGND	Ground terminals	Separate power (PGND1–PGND5), analog (AGND), LDO (GNDLDO), and thermal pad (EPGND) grounds - must be connected to distinct PCB copper zones and joined at single point near EPGND to avoid noise coupling.

Key Features

Feature	Design Value
Configurable Power Sequencing	Four startup ranks (Rank 0–3) per rail stored in NVM - enables precise timing control for MPU core, DDR, and peripherals during POWER_UP/POWER_DOWN without external logic.
DDR3 Memory Support	Integrated REFDDR (0.55 V ±1%) and LDO3 with sink-source mode - eliminates need for external DDR termination IC and reduces BOM count in STM32MP1-based designs.
USB Power Architecture	5.2 V boost + dual 500 mA USB switches + LDO5 with auto-source detection - supports simultaneous USB host, OTG, and PHY supply from battery or 5 V adapter with seamless handover.
Ultra-Low Standby Consumption	110 µA in STANDBY mode (AP ON, DDR self-refresh off) - extends battery life in always-on wearable and sensor hub applications.
Robust Protection Suite	Per-rail OCP (5 µs–30 ms response), OTP (125 °C warning / 150 °C shutdown), VINOK/VINLOW monitoring with programmable thresholds - ensures safe operation under fault conditions.

Applications

STM32MP1-Based Industrial HMI

Wearable Health Monitor

Use Scenario: Touchscreen HMI with Cortex-A7 + Cortex-M4 dual-core MPU, DDR3L memory, capacitive touch controller, and CAN/Ethernet interfaces.

IC Role / Device Role: Primary PMIC supplying VDD_CORE (1.2 V), VDD_DDR (1.1 V), VDD_IO (3.3 V), VREF_DDR (0.55 V), and USB PHY (3.3 V) with synchronized startup sequence.

Use Value: Eliminates discrete DC-DC + LDO solution; reduces PCB area by 40% and enables <100 ms cold boot time via NVM-stored Rank 3 sequencing.

Use Scenario: Compact wrist-worn ECG/PPG sensor with Bluetooth LE connectivity, OLED display, and rechargeable coin cell.

IC Role / Device Role: Single-chip power source managing ultra-low-power STOP mode (370 µA), USB charging (via BSTOUT → VBUSOTG), and dynamic LDO voltage scaling for sensor biasing.

Use Value: Achieves 14-day battery life using STANDBY (110 µA) and STOP (370 µA) modes; LDO3 bypass mode cuts DDR termination loss during sleep.

Smart Home Gateway

Portable IoT Edge Node

Use Scenario: Wi-Fi + Zigbee gateway with dual-band RF, multi-GPIO expansion, and local voice processing.

IC Role / Device Role: Central power arbiter delivering isolated 3.3 V (peripherals), 1.8 V (RF ICs), 1.2 V (MPU core), and 5 V (USB host ports) with EMI-optimized synchronous switching.

Use Value: Integrated PLL synchronization reduces conducted EMI by >15 dB compared to asynchronous buck controllers - simplifies FCC/CE certification.

Use Scenario: Battery-powered environmental sensor node with LoRaWAN radio, temperature/humidity/pressure sensors, and solar charge management.

IC Role / Device Role: Adaptive power manager using VINOK monitoring to switch between solar input (3.6 V) and LiPo battery (3.0–4.2 V), dynamically enabling BUCK3 (1.8 V) only during sensor readout.

Use Value: Programmable VINOK threshold (3.2–3.6 V) prevents brownout during partial shading; NVM allows field reconfiguration for different battery chemistries.

Equivalent & Alternatives

The following parts are listed as comparable options for similar PMIC applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
TPS650860A0RSMT	4 buck + 6 LDO + 5 V boost; no DDR-specific REFDDR or sink-source LDO3; uses PMBus instead of I²C; larger QFN-56 package.	Targets TI Sitara AMx processors; lacks native STM32MP1 sequencing maps and DDR3 termination features.	Choose when designing with AM62x/AM65x and requiring PMBus telemetry, not STM32MP1 compatibility.
MIC7412YMME	3 buck + 4 LDO; no boost, no USB switches, no NVM; fixed-output voltages only; MSOP-16 package.	Intended for low-cost MCU applications (e.g., PIC32, ESP32); no DDR support or multi-rail sequencing capability.	Choose only for simple, cost-sensitive designs without DDR, USB, or programmable sequencing requirements.

Compared with TPS650860A0RSMT and MIC7412YMME, STPMIC1DPQR uniquely combines STM32MP1-optimized NVM configuration, DDR3 termination capability, and ultra-low OFF-mode current (50 µA), making it irreplaceable for production-grade STM32MP1 designs requiring BOM consolidation and certified power integrity.

Availability

STPMIC1DPQR is available at Aetrix Electronics and suitable for wearable health monitors, industrial HMIs, smart home gateways, and portable IoT edge nodes requiring stable component supply across long-life product cycles.

Supply support for STPMIC1DPQR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, specializing in microcontrollers, power management, sensors, and automotive ICs with vertical manufacturing and broad industrial qualification.

The STPMIC1 product line was engineered specifically as a scalable, NVM-programmable PMIC family for STM32MP1 series application processors - prioritizing DDR3/LPDDR3 support, USB OTG/host integration, and ultra-low-power states for Linux-capable embedded systems.

FAQ

What is the default NVM configuration for STPMIC1DPQR?

STPMIC1DPQR is pre-programmed for STM32MP15x variants: BUCK1 = 1.2 V (Rank 3), BUCK2 = 1.1 V (Rank 0), BUCK3 = 3.3 V (Rank 1), BUCK4 = 1.2 V (Rank 2); LDO1–LDO6 and REFDDR match Table 1 values (e.g., LDO2 = 1.8 V, LDO5 = 3.3 V). All startup ranks, voltage settings, and I²C address are stored in factory NVM and can be reprogrammed via I²C.

How does LDO3 operate in sink-source mode for DDR3 termination?

In sink-source mode, LDO3 regulates VTT_DDR3 to exactly half of BUCK2's output (e.g., 0.675 V when BUCK2 = 1.35 V), sourcing or sinking up to ±120 mARMS to maintain termination voltage during DDR3 data transitions. It requires BUCK2 to supply VOUT2, and LDO3IN must be tied to VOUT2 - confirmed in DS12792 Section 3.4, LDO3 sink-source mode test conditions.

Can STPMIC1DPQR support LPDDR4 or DDR4 memory?

No - STPMIC1DPQR is validated only for DDR3, DDR3L, LPDDR2, and LPDDR3 per datasheet Section 2 (Typical Application Schematic) and Table 1 (REFDDR = 0.55 V, matching DDR3 VREF tolerance). DDR4 requires 0.6 V VREF and higher VTT current capability; LPDDR4 needs 0.35 V VREF and different termination topology - neither supported by LDO3 or REFDDR design.

What is the minimum recommended output capacitance for BUCK1?

The datasheet specifies 22 µF ceramic (GRM188R60J226MEA0, 0603) for CVOUT1, with 10 µF input capacitance (CBUCK1IN) on BUCK1IN. This combination ensures <45 mV load transient deviation and stable COT operation across –40 °C to +125 °C; reducing below 22 µF risks instability and increased ripple per DS12792 Section 2.1 and Table 2.

STPMIC1DPQR Specifications

Product attributes: Attribute value

Manufacturer:: STMicroelectronics

Series:: -

Package/Case:: 44-WFQFN Exposed Pad

Packaging:: Tape & Reel (TR)

Product Status:: Active

Applications:: General Purpose

Current - Supply:: 1.2mA

Voltage - Supply:: 2.8V ~ 5.5V

Operating Temperature:: -40°C ~ 105°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 44-WFQFN (5x6)

STPMIC1DPQR FAQ

1.How can I place an order for STPMIC1DPQR through Aetrix?

Please submit a Request for Quotation (RFQ) for STPMIC1DPQR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for STPMIC1DPQR reliable?

The price and inventory of STPMIC1DPQR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for STPMIC1DPQR is usually 5 days.

3.What payment methods are accepted for STPMIC1DPQR?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for STPMIC1DPQR transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for STPMIC1DPQR?

STPMIC1DPQR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your STPMIC1DPQR order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for STPMIC1DPQR?

For technical support, including STPMIC1DPQR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your STPMIC1DPQR requirements.

6.How does Aetrix verify that STPMIC1DPQR is sourced from the original manufacturer or authorized distributors?

All STPMIC1DPQR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that STPMIC1DPQR meets industry standards.

7.What is the process for return or replacement of STPMIC1DPQR?

All STPMIC1DPQR units undergo pre-shipment inspection (PSI). If there is an issue with STPMIC1DPQR, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The STPMIC1DPQR part is unused and in its original packaging.

Return procedure for STPMIC1DPQR:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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