STMicroelectronics STPS20L120CFP

Overview

STPS20L120CFP from STMicroelectronics is a dual-center-tap Schottky rectifier in insulated TO-220FPAB package, rated for 120 V repetitive peak reverse voltage, 2 × 10 A average forward current per diode, and 150 °C maximum junction temperature. It delivers low forward voltage drop (0.55 V typ. at 10 A, 125 °C) and supports high-frequency switch-mode power supplies with 12 pF typical junction capacitance and 1500 V_rms insulation.

For engineers reviewing the STPS20L120CFP datasheet, STPS20L120CFP pinout, STPS20L120CFP application, or STPS20L120CFP equivalent, key selection criteria include thermal resistance (R_th(j-c) = 4.9 °C/W per diode), avalanche capability (8000 W peak, 1 µs), and dual-diode center-tap configuration for bridgeless PFC or synchronous rectification topologies.

Technical Context

This device integrates two independent Schottky diodes sharing a common cathode terminal (center-tap configuration), enabling use in full-wave rectification without external center-tapped transformers. Its TO-220FPAB package provides 1500 V_rms isolation between leads and heatsink, eliminating need for insulating washers in high-voltage AC/DC adapters.

The diode pair exhibits matched forward characteristics (VF ≤ 0.69 V max at 10 A, 125 °C) and avalanche-rated surge handling (200 A non-repetitive, 10 ms). Thermal coupling between diodes is characterized via R_th(c) = 3.2 °C/W, allowing accurate junction temperature estimation when both diodes conduct simultaneously.

Key Specifications

Pinout & Package

STPS20L120CFP uses the TO-220FPAB package: insulated plastic housing with metal tab isolated from internal leads, 1500 V_rms dielectric strength, and screw-mounting capability (0.4–0.6 N·m torque).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-center-tap Schottky rectifier applications.

Compared with VS-20CPH06-M3 and MBR20120CT, STPS20L120CFP uniquely combines 120 V rating, dual-center-tap topology, and integrated 1500 V_rms isolation-enabling simplified, safer, and more compact designs in Class II AC/DC power supplies without added insulation components.

Availability

STPS20L120CFP is available at Aetrix Electronics and suitable for high-frequency switch-mode power supplies, universal-input AC/DC adapters, and industrial 24 V power modules requiring stable component supply and long-term lifecycle support.

Supply support for STPS20L120CFP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing analog, digital, and mixed-signal ICs for automotive, industrial, and power applications.

STPS20L120CFP belongs to ST's Power Schottky Rectifier product line, engineered specifically for high-efficiency, high-reliability AC/DC and DC/DC conversion in space-constrained, thermally demanding environments.

FAQ

What is the maximum allowable case temperature for continuous operation?

The maximum case temperature is derived from T_j(max) = 150 °C and R_th(j-c) = 4.9 °C/W per diode. At full 10 A per diode, power dissipation is ~5.9 W per diode (using P = 0.595×I_F(AV) + 0.0095×I_F(RMS)²), limiting case temperature to ≤119 °C. Derating is required above this point.

Can STPS20L120CFP replace STPS20L120CT in existing designs?

Yes, but with thermal and mounting adjustments: STPS20L120CFP has higher R_th(j-c) (4.9 vs. 1.1 °C/W) due to insulation, requiring larger heatsinks or lower ambient temperatures. The pinout is identical, and the isolated tab eliminates need for insulating hardware.

Is avalanche capability tested per diode or per package?

Avalanche capability is specified per diode: P_ARM = 8000 W at T_j = 25 °C, t_p = 1 µs. Both diodes may be subjected to simultaneous avalanche events, but total package dissipation must remain within thermal limits defined by R_th(j-c) and R_th(c).

What is the recommended PCB layout for minimizing thermal resistance?

Use ≥25 mm² copper pour (2 oz Cu minimum) under the isolated tab, connected to system ground plane via multiple thermal vias (≥8 × 0.3 mm diameter). Maintain ≥1.5 mm clearance from adjacent traces to prevent creepage failure at 1500 V_rms. Avoid solder mask over thermal pad.