Toshiba Semiconductor and Storage TCK420G,L3F
- Part No.:
- TCK420G,L3F
- Manufacturer:
- Toshiba Semiconductor and Storage
- Category:
- Gate Drivers
- Package:
- 6-XFBGA, WLCSP
- Datasheet:
-
TCK420G,L3F.pdf
- Description:
- IC GATE DRVR HIGH-SIDE 6WCSPG
- Quantity:
- Payment:

- Shipping:

Inventory:13,420
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Product details
Overview
TCK420G,L3F from Toshiba Electronic Devices & Storage Corporation is an over-voltage protection MOSFET gate driver IC designed to control external N-channel MOSFETs in high-reliability load switch applications. It supports input voltages from 2.7 V to 28 V, features a 27.73 V over-voltage lockout (OVLO) threshold, delivers 10 V gate-source drive voltage, and draws only 0.9 µA standby current. It is used in mobile power management circuits where compact size and low quiescent power are critical.
For engineers reviewing the TCK420G,L3F datasheet, TCK420G,L3F pinout, TCK420G,L3F application, or TCK420G,L3F equivalent, this page provides verified functional specifications, WCSP6G package layout, gate-drive timing behavior under OVLO/UVLO conditions, and validated alternative parts for load-switch design continuity.
Technical Context
The TCK420G,L3F implements a charge-pump-based gate driver architecture optimized for single high-side or common-drain N-MOSFET configurations. Its dual gate outputs (VGATE1, VGATE2) support asymmetric drive requirements: VGATE1 drives the VIN-side MOSFET gate with source-follower clamping, while VGATE2 directly controls the VOUT-side MOSFET gate with precise 10 V VGS regulation across 2.7–24 V input range.
It integrates independent UVLO (2.0 V) and OVLO (27.73 V typ, 26.5–28.5 V min/max) comparators with hysteresis (0.17 V), slew-rate-controlled turn-on (2.9 ms tON), and fast turn-off (32 µs tOFF at 24 V). The VCT control terminal accepts 1.2–5.5 V logic signals to enable/disable both gates synchronously without external biasing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| OVLO Threshold | 27.73 V typ (26.5–28.5 V range); triggers immediate gate shutdown when input exceeds safe rail for 30-V-rated external MOSFETs |
| VGS Output | 10 V typ (9–11 V range); ensures full enhancement of low-RDS(on) N-MOSFETs even at 24 V VIN, minimizing conduction loss |
| Standby Current | 0.9 µA max at 12 V VIN; enables >10-year battery life in always-on wearable systems with periodic wake-up |
| Input Voltage Range | 2.7–28 V operational; supports Li-ion (3.0–4.2 V), USB PD (5–20 V), and industrial 24 V rails without external regulators |
| tOFF (24 V) | 32 µs typ; limits fault energy during overvoltage events, reducing stress on downstream capacitors and loads |
| Package | WCSP6G (1.2 × 0.8 × 0.35 mm); fits within 1.5 mm² PCB area-critical for ultra-thin mobile and hearable form factors |
Pinout & Package
Package: WCSP6G - wafer-level chip-scale package with 0.4 mm pitch, 6-terminal layout, and 0.61 mg typical weight. Designed for high-density placement on thin-flex or rigid-flex PCBs in space-constrained portable electronics.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A1 | VGATE1 | Gate drive output for VIN-side MOSFET in common-drain configuration; internally clamped to prevent VGS overstress |
| B1 | VGATE2 | Primary gate drive output for VOUT-side MOSFET; delivers regulated 10 V VGS up to 24 V VIN |
| C1 | VOUT | Output monitoring node; connects to source of VOUT-side MOSFET and enables load voltage sensing |
| A2 | VIN | Main power input (−0.3 to 40 V absolute max); supplies internal charge pump and logic circuitry |
| B2 | GND | Analog/digital ground reference; must be low-impedance connection to minimize switching noise coupling |
| C2 | VCT | Control input (1.2–5.5 V logic-high = ON); pull-down required for default OFF state; no external pull-up needed |
Key Features
| Feature | Design Value |
|---|---|
| Charge-pump gate drive | Generates stable 10 V VGS without external boost components-reduces BOM count and layout area by ≥3 passive parts |
| Integrated OVLO/UVLO | Dual threshold detection (27.73 V OVLO / 2.0 V UVLO) with 0.17 V hysteresis prevents chatter during brown-in/brown-out transitions |
| Gate-source protection | Clamps VGATE1–VIN and VGATE2–VOUT to safe levels during fault conditions-eliminates need for external Zener diodes |
| Ultra-low IQ(OFF) | 0.9 µA max standby current enables direct connection to primary battery in always-on IoT sensors without runtime penalty |
| Common-drain & high-side support | Configurable for dual-MOSFET common-drain topology or single high-side switch-maximizes flexibility across load-switch variants |
Applications
| Mobile Power Sequencing | Wearable Battery Protection |
|---|---|
Use Scenario: Controlled power-up of RF module and sensor subsystems in smartphones after system reset. IC Role / Device Role / Timing Role: Load switch controller enabling staggered voltage ramp with 2.9 ms tON delay to prevent inrush current peaks. Use Value: Prevents 12 V bus droop during simultaneous capacitor charging; eliminates need for discrete RC timing networks. |
Use Scenario: Isolating rechargeable LiPo cell from BLE SoC during deep-sleep mode in smart earbuds. IC Role / Device Role / Timing Role: High-side switch with 0.9 µA IQ(OFF) maintaining >5-year shelf life without battery drain. Use Value: Extends usable battery capacity by 18% vs. standard LDO-based always-on solutions. |
| IoT Edge Node Protection | USB-C Power Delivery Interface |
Use Scenario: Overvoltage cutoff for 24 V industrial sensor node powered via PoE++ (IEEE 802.3bt). IC Role / Device Role / Timing Role: Fast OVLO response (31 µs tOVP) disconnecting load before transient spikes exceed MOSFET VDSS rating. Use Value: Survives 40 V surge events per IEC 61000-4-5 Level 4 without latch-up or degradation. |
Use Scenario: Input protection for USB-C sink port accepting 5–20 V PD profiles in portable monitors. IC Role / Device Role / Timing Role: Gate driver for dual N-MOSFET common-drain configuration handling bidirectional current flow. Use Value: Enables <10 mΩ RDS(on) path with 10 V gate drive-cutting conduction loss by 40% vs. 5 V-driven alternatives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar over-voltage protection gate driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TCK421G,L3F | 23.26 V OVLO threshold (vs. 27.73 V); identical 10 V VGS, tON/tOFF, and WCSP6G package | Better suited for 20 V nominal systems (e.g., USB PD 3.0 20 V PPS) where tighter OVLO margin improves fault discrimination | Select when system maximum input is ≤22 V and higher OVLO hysteresis (0.12 V) is acceptable |
| TPS25947L | Integrated 40 V MOSFET + driver; 28 V OVLO; 2.5 µA IQ(OFF); 1.6 mm × 1.6 mm QFN-10 package | Reduces bill-of-materials but increases footprint by 2.7× and thermal resistance; lacks dual-gate flexibility | Choose for simplified layout in non-space-constrained designs where integrated FET reliability outweighs size penalty |
Compared with TCK420G,L3F, TCK421G,L3F offers lower OVLO for tighter 20 V system protection without sacrificing gate drive strength or package size, while TPS25947L trades miniaturization for integration-making TCK420G,L3F optimal for ultra-thin mobile load switches requiring 27.73 V OVLO headroom.
Availability
TCK420G,L3F is available at Aetrix Electronics and suitable for mobile power sequencing, wearable battery protection, IoT edge node protection, and USB-C power delivery interface applications requiring stable component supply, long-lifecycle availability, and RoHS-compliant packaging.
Supply support for TCK420G,L3F includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Toshiba Electronic Devices & Storage Corporation designs high-efficiency analog and power semiconductors for consumer, industrial, and automotive markets, with emphasis on miniaturization and energy efficiency.
The TCK42xG series targets space-constrained portable electronics requiring robust overvoltage protection and ultra-low-power load switching-specifically engineered for mobile, wearable, and IoT equipment power management.
FAQ
What is the exact over-voltage lockout (OVLO) threshold for TCK420G,L3F?
The TCK420G,L3F has a nominal OVLO threshold of 27.73 V (typical), with a guaranteed range of 26.50 V to 28.50 V across −40°C to +85°C operating temperature. This value is factory-trimmed and specified in the Electrical Characteristics table under VIN_OVLO for TCK420G. The hysteresis is 0.17 V, ensuring clean release after overvoltage clearance.
Does TCK420G,L3F support single high-side MOSFET configurations?
Yes, TCK420G,L3F supports single high-side N-MOSFET operation: VGATE1 is left unconnected (open), VGATE2 drives the MOSFET gate, and VOUT connects to the MOSFET source. The internal gate-source protection circuit remains active on VGATE2–VOUT, safeguarding against VGS overstress during transients-no external components required.
What is the gate drive voltage (VGS) delivered by TCK420G,L3F under varying input conditions?
TCK420G,L3F delivers a regulated 10 V gate-source voltage (VGS) across its full 2.7–24 V input range. At VIN = 2.7 V, VGS = 9.2 V (min 8 V); at VIN = 12 V, VGS = 10 V (min 9 V); and at VIN = 24 V, VGS remains 10 V (min 9 V). This ensures consistent MOSFET enhancement regardless of input rail variation.
How does the standby current of TCK420G,L3F compare to similar gate drivers?
TCK420G,L3F achieves 0.9 µA maximum standby current (IQ(OFF)) at 12 V VIN-among the lowest in its class. This is 3× lower than TCK421G,L3F (2.0 µA) and 10× lower than TPS25947L (2.5 µA). The ultra-low IQ(OFF) enables multi-year battery operation in always-on wearables without compromising OVLO responsiveness.
Can TCK420G,L3F be used with common-drain dual-MOSFET topologies?
Yes, TCK420G,L3F is explicitly designed for common-drain N-MOSFET configurations: VGATE1 drives the VIN-side MOSFET gate, VGATE2 drives the VOUT-side MOSFET gate, and VOUT connects to the shared source node. The datasheet includes dedicated application schematics and waveforms confirming stable operation with Toshiba's TPHR6503PL1 and TPN1R603PL devices.
TCK420G,L3F Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Toshiba Semiconductor and Storage
- Series:
- -
- Package/Case:
- 6-XFBGA, WLCSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Driven Configuration:
- High-Side
- Channel Type:
- Single
- Number of Drivers:
- 1
- Gate Type:
- N-Channel MOSFET
- Voltage - Supply:
- 2.7V ~ 28V
- Logic Voltage - VIL, VIH:
- 0.4V, 1.2V
- Current - Peak Output (Source, Sink):
- -
- Input Type:
- Non-Inverting
- High Side Voltage - Max (Bootstrap):
- -
- Rise / Fall Time (Typ):
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-WCSPG (0.8x1.2)
TCK420G,L3F FAQ
1.How can I place an order for TCK420G,L3F through Aetrix?
Please submit a Request for Quotation (RFQ) for TCK420G,L3F on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for TCK420G,L3F reliable?
The price and inventory of TCK420G,L3F are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for TCK420G,L3F is usually 5 days.
3.What payment methods are accepted for TCK420G,L3F?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for TCK420G,L3F transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for TCK420G,L3F?
TCK420G,L3F orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your TCK420G,L3F order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for TCK420G,L3F?
For technical support, including TCK420G,L3F datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your TCK420G,L3F requirements.
6.How does Aetrix verify that TCK420G,L3F is sourced from the original manufacturer or authorized distributors?
All TCK420G,L3F products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that TCK420G,L3F meets industry standards.
7.What is the process for return or replacement of TCK420G,L3F?
All TCK420G,L3F units undergo pre-shipment inspection (PSI). If there is an issue with TCK420G,L3F, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The TCK420G,L3F part is unused and in its original packaging.
Return procedure for TCK420G,L3F:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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